Datasheet Texas Instruments SN74AVC6T622

ManufacturerTexas Instruments
SeriesSN74AVC6T622
Datasheet Texas Instruments SN74AVC6T622

Audio Codec AC'97 Voltage-Translation Transceiver

Datasheets

Audio Codec AC'97 Voltage-Translation Transceiver datasheet
PDF, 1.1 Mb, Revision: A, File published: Mar 24, 2009
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Prices

Status

SN74AVC6T622PWRSN74AVC6T622RGYRSN74AVC6T622ZXYR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYes

Packaging

SN74AVC6T622PWRSN74AVC6T622RGYRSN74AVC6T622ZXYR
N123
Pin202020
Package TypePWRGYZXY
Industry STD TermTSSOPVQFNBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PQFP-NS-PBGA-N
Package QTY200030002500
CarrierLARGE T&RLARGE T&RLARGE T&R
Device MarkingWU622WU622WU622
Width (mm)4.43.53
Length (mm)6.54.52.5
Thickness (mm)1.9.36
Pitch (mm).65.5.5
Max Height (mm)1.21.61
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsSN74AVC6T622PWR
SN74AVC6T622PWR
SN74AVC6T622RGYR
SN74AVC6T622RGYR
SN74AVC6T622ZXYR
SN74AVC6T622ZXYR
Bits666
ICCA Static Current, mA0.010.010.01
ICCB Static Current, mA0.010.010.01
Package GroupTSSOPVQFNBGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)20VQFN: 16 mm2: 3.5 x 4.5(VQFN)20BGA MICROSTAR JUNIOR: 8 mm2: 3 x 2.5(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalog
Special FeaturesAC'97AC'97AC'97
Static Current, mA0.0150.0150.015
VCCA(Max), V3.63.63.6
VCCA(Min), V1.21.21.2
VCCB(Max), V3.63.63.6
VCCB(Min), V1.21.21.2

Eco Plan

SN74AVC6T622PWRSN74AVC6T622RGYRSN74AVC6T622ZXYR
RoHSCompliantCompliantCompliant

Application Notes

  • Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)
    PDF, 126 Kb, Revision: B, File published: Jul 7, 1999
    Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i
  • AVC Logic Family Technology and Applications (Rev. A)
    PDF, 148 Kb, Revision: A, File published: Aug 26, 1998
    Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
  • Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)
    PDF, 390 Kb, Revision: B, File published: Apr 30, 2015
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, File published: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Voltage Level Translation> Application Specific Voltage Translation