Datasheet Texas Instruments SN74LS280
Manufacturer | Texas Instruments |
Series | SN74LS280 |
9-bit odd/even parity generators / checkers
Datasheets
9-Bit Odd/Even Parity Generators/Checkers datasheet
PDF, 1.0 Mb, File published: Mar 1, 1988
Extract from the document
Prices
Status
SN74LS280D | SN74LS280J | SN74LS280N | SN74LS280N3 | SN74LS280NSR | |
---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | No | No | No |
Packaging
SN74LS280D | SN74LS280J | SN74LS280N | SN74LS280N3 | SN74LS280NSR | |
---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 |
Pin | 14 | 14 | 14 | 14 | 14 |
Package Type | D | J | N | N | NS |
Industry STD Term | SOIC | CDIP | PDIP | PDIP | SOP |
JEDEC Code | R-PDSO-G | R-GDIP-T | R-PDIP-T | R-PDIP-T | R-PDSO-G |
Package QTY | 50 | 25 | 2000 | ||
Carrier | TUBE | TUBE | LARGE T&R | ||
Device Marking | LS280 | SN74LS280N | 74LS280 | ||
Width (mm) | 3.91 | 6.67 | 6.35 | 6.35 | 5.3 |
Length (mm) | 8.65 | 19.56 | 19.3 | 19.3 | 10.3 |
Thickness (mm) | 1.58 | 4.57 | 3.9 | 3.9 | 1.95 |
Pitch (mm) | 1.27 | 2.54 | 2.54 | 2.54 | 1.27 |
Max Height (mm) | 1.75 | 5.08 | 5.08 | 5.08 | 2 |
Mechanical Data | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | SN74LS280D | SN74LS280J | SN74LS280N | SN74LS280N3 | SN74LS280NSR |
---|---|---|---|---|---|
Approx. Price (US$) | 0.45 | 1ku | 0.45 | 1ku | |||
Bits | 2 | 2 | 2 | ||
Bits(#) | 2 | 2 | |||
F @ Nom Voltage(Max), Mhz | 35 | 35 | 35 | ||
F @ Nom Voltage(Max)(Mhz) | 35 | 35 | |||
Function | Parity | Parity | Parity | Parity | Parity |
ICC @ Nom Voltage(Max), mA | 27 | 27 | 27 | ||
ICC @ Nom Voltage(Max)(mA) | 27 | 27 | |||
Input Type | TTL | TTL | |||
Operating Temperature Range, C | 0 to 70 | 0 to 70 | 0 to 70 | ||
Operating Temperature Range(C) | 0 to 70 | 0 to 70 | |||
Output Drive (IOL/IOH)(Max), mA | 8/-0.4 | 8/-0.4 | 8/-0.4 | ||
Output Drive (IOL/IOH)(Max)(mA) | 8/-0.4 | 8/-0.4 | |||
Output Type | CMOS | CMOS | |||
Package Group | SOIC | PDIP SO SOIC | PDIP | PDIP | SO |
Package Size: mm2:W x L, PKG | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | See datasheet (PDIP) | 14SO: 80 mm2: 7.8 x 10.2(SO) | ||
Package Size: mm2:W x L (PKG) | See datasheet (PDIP) See datasheet (CDIP) | See datasheet (PDIP) | |||
Rating | Catalog | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | |||
Technology Family | LS | LS | LS | LS | LS |
Type | Other | Other | Other | Other | Other |
VCC(Max), V | 5.25 | 5.25 | 5.25 | ||
VCC(Max)(V) | 5.25 | 5.25 | |||
VCC(Min), V | 4.75 | 4.75 | 4.75 | ||
VCC(Min)(V) | 4.75 | 4.75 | |||
Voltage(Nom), V | 5 | 5 | 5 | ||
Voltage(Nom)(V) | 5 | 5 | |||
tpd @ Nom Voltage(Max), ns | 50 | 50 | 50 | ||
tpd @ Nom Voltage(Max)(ns) | 50 | 50 |
Eco Plan
SN74LS280D | SN74LS280J | SN74LS280N | SN74LS280N3 | SN74LS280NSR | |
---|---|---|---|---|---|
RoHS | Compliant | Not Compliant | Compliant | Not Compliant | Compliant |
Pb Free | No | No | Yes |
Application Notes
- Designing with the SN54/74LS123 (Rev. A)PDF, 118 Kb, Revision: A, File published: Mar 1, 1997
The Texas Instruments (TI) SN54/74LS123 dual retriggerable monostable multivibrator is a one-shot device capable of verylong output pulses and up to 100% duty cycle. The ?LS123 also features dc triggering from gated low-level active A andhigh-level active B inputs and provides a clear input that terminates the output pulse of any predetermined time independentof timing components R ext and
Model Line
Series: SN74LS280 (5)
Manufacturer's Classification
- Semiconductors> Logic> Specialty Logic> Counter/Arithmetic/Parity Function