Datasheet Texas Instruments SN74LV10A
| Manufacturer | Texas Instruments |
| Series | SN74LV10A |
Triple 3-Input Positive-NAND Gate
Datasheets
SN54LV10A, SN74LV10A datasheet
PDF, 853 Kb, Revision: E, File published: Apr 22, 2005
Extract from the document
Prices
Status
| SN74LV10AD | SN74LV10ADR | SN74LV10ADRG4 | SN74LV10ANSR | SN74LV10APW | SN74LV10APWR | SN74LV10APWRG4 | |
|---|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No | No |
Packaging
| SN74LV10AD | SN74LV10ADR | SN74LV10ADRG4 | SN74LV10ANSR | SN74LV10APW | SN74LV10APWR | SN74LV10APWRG4 | |
|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
| Pin | 14 | 14 | 14 | 14 | 14 | 14 | 14 |
| Package Type | D | D | D | NS | PW | PW | PW |
| Industry STD Term | SOIC | SOIC | SOIC | SOP | TSSOP | TSSOP | TSSOP |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 50 | 2500 | 2500 | 2000 | 90 | 2000 | 2000 |
| Carrier | TUBE | LARGE T&R | LARGE T&R | LARGE T&R | TUBE | LARGE T&R | LARGE T&R |
| Device Marking | LV10A | LV10A | LV10A | 74LV10A | LV10A | LV10A | LV10A |
| Width (mm) | 3.91 | 3.91 | 3.91 | 5.3 | 4.4 | 4.4 | 4.4 |
| Length (mm) | 8.65 | 8.65 | 8.65 | 10.3 | 5 | 5 | 5 |
| Thickness (mm) | 1.58 | 1.58 | 1.58 | 1.95 | 1 | 1 | 1 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | .65 | .65 | .65 |
| Max Height (mm) | 1.75 | 1.75 | 1.75 | 2 | 1.2 | 1.2 | 1.2 |
| Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | SN74LV10AD | SN74LV10ADR | SN74LV10ADRG4 | SN74LV10ANSR | SN74LV10APW | SN74LV10APWR | SN74LV10APWRG4 |
|---|---|---|---|---|---|---|---|
| Bits | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| F @ Nom Voltage(Max), Mhz | 70 | 70 | 70 | 70 | 70 | 70 | 70 |
| ICC @ Nom Voltage(Max), mA | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 | 0.02 |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
| Output Drive (IOL/IOH)(Max), mA | 50/-50 | 50/-50 | 50/-50 | 50/-50 | 50/-50 | 50/-50 | 50/-50 |
| Package Group | SOIC | SOIC | SOIC | SO | TSSOP | TSSOP | TSSOP |
| Package Size: mm2:W x L, PKG | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | 14SO: 80 mm2: 7.8 x 10.2(SO) | 14TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 14TSSOP: 32 mm2: 6.4 x 5(TSSOP) | 14TSSOP: 32 mm2: 6.4 x 5(TSSOP) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No | No |
| Technology Family | LV-A | LV-A | LV-A | LV-A | LV-A | LV-A | LV-A |
| VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
| VCC(Min), V | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
| Voltage(Nom), V | 2.5,3.3,5 | 2.5,3.3,5 | 2.5,3.3,5 | 2.5,3.3,5 | 2.5,3.3,5 | 2.5,3.3,5 | 2.5,3.3,5 |
| tpd @ Nom Voltage(Max), ns | 20.5,13.5,9 | 20.5,13.5,9 | 20.5,13.5,9 | 20.5,13.5,9 | 20.5,13.5,9 | 20.5,13.5,9 | 20.5,13.5,9 |
Eco Plan
| SN74LV10AD | SN74LV10ADR | SN74LV10ADRG4 | SN74LV10ANSR | SN74LV10APW | SN74LV10APWR | SN74LV10APWRG4 | |
|---|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Model Line
Series: SN74LV10A (7)
Manufacturer's Classification
- Semiconductors> Logic> Gate> NAND Gate
