Datasheet Texas Instruments SN74LVC1G08-Q1
| Manufacturer | Texas Instruments |
| Series | SN74LVC1G08-Q1 |
Automotive Catalog Single 2-Input Positive-AND Gate
Datasheets
Single 2-Input Positive-AND Gate datasheet
PDF, 848 Kb, Revision: F, File published: Apr 10, 2008
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Prices
Status
| SN74LVC1G08IDCKRQ1 | SN74LVC1G08QDBVRQ1 | SN74LVC1G08QDCKRQ1 | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | Yes |
Packaging
| SN74LVC1G08IDCKRQ1 | SN74LVC1G08QDBVRQ1 | SN74LVC1G08QDCKRQ1 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 5 | 5 | 5 |
| Package Type | DCK | DBV | DCK |
| Industry STD Term | SOT-SC70 | SOT-23 | SOT-SC70 |
| JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 3000 | 3000 | 3000 |
| Carrier | LARGE T&R | LARGE T&R | LARGE T&R |
| Device Marking | CEO | C08O | CEO |
| Width (mm) | 1.25 | 1.6 | 1.25 |
| Length (mm) | 2 | 2.9 | 2 |
| Thickness (mm) | .9 | 1.2 | .9 |
| Pitch (mm) | .65 | .95 | .65 |
| Max Height (mm) | 1.1 | 1.45 | 1.1 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | SN74LVC1G08IDCKRQ1 | SN74LVC1G08QDBVRQ1 | SN74LVC1G08QDCKRQ1 |
|---|---|---|---|
| 3-State Output | No | No | No |
| Bits | 1 | 1 | 1 |
| F @ Nom Voltage(Max), Mhz | 150 | 150 | 150 |
| Gate Type | AND | AND | AND |
| ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 |
| Logic | True | True | True |
| Operating Temperature Range, C | -40 to 125,-40 to 85 | -40 to 125,-40 to 85 | -40 to 125,-40 to 85 |
| Output Drive (IOL/IOH)(Max), mA | 32/-32 | 32/-32 | 32/-32 |
| Package Group | SC70 | SOT-23 | SC70 |
| Package Size: mm2:W x L, PKG | 5SC70: 4 mm2: 2.1 x 2(SC70) | 5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) | 5SC70: 4 mm2: 2.1 x 2(SC70) |
| Rating | Automotive | Automotive | Automotive |
| Schmitt Trigger | No | No | No |
| Special Features | Ioff,down translation to Vcc,Small DPW package,low power | Ioff,down translation to Vcc,Small DPW package,low power | Ioff,down translation to Vcc,Small DPW package,low power |
| Sub-Family | AND Gate | AND Gate | AND Gate |
| Technology Family | LVC | LVC | LVC |
| VCC(Max), V | 5.5 | 5.5 | 5.5 |
| VCC(Min), V | 1.65 | 1.65 | 1.65 |
| Voltage(Nom), V | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 |
| tpd @ Nom Voltage(Max), ns | 8,5.5,4.5,4 | 8,5.5,4.5,4 | 8,5.5,4.5,4 |
Eco Plan
| SN74LVC1G08IDCKRQ1 | SN74LVC1G08QDBVRQ1 | SN74LVC1G08QDCKRQ1 | |
|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant |
Application Notes
- LVC Characterization InformationPDF, 114 Kb, File published: Dec 1, 1996
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices. - Use of the CMOS Unbuffered Inverter in Oscillator CircuitsPDF, 796 Kb, File published: Nov 6, 2003
CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly
Model Line
Series: SN74LVC1G08-Q1 (3)
Manufacturer's Classification
- Semiconductors> Logic> Little Logic
