Datasheet Texas Instruments SN74LVC1G74
Manufacturer | Texas Instruments |
Series | SN74LVC1G74 |
Single Positive-Edge-Triggered D-Type Flip-Flop With Clear and Preset
Datasheets
SN74LVC1G74 Single Positive-Edge-Triggered D-Type Flip-Flop with Clear and Preset datasheet
PDF, 1.3 Mb, Revision: E, File published: Jan 25, 2015
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Prices
Status
SN74LVC1G74DCTR | SN74LVC1G74DCUR | SN74LVC1G74DCURG4 | SN74LVC1G74DCUT | SN74LVC1G74DQER | SN74LVC1G74RSE2 | SN74LVC1G74RSER | |
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Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | Yes | Yes | Yes | Yes | Yes |
Packaging
SN74LVC1G74DCTR | SN74LVC1G74DCUR | SN74LVC1G74DCURG4 | SN74LVC1G74DCUT | SN74LVC1G74DQER | SN74LVC1G74RSE2 | SN74LVC1G74RSER | |
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N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
Pin | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
Package Type | DCT | DCU | DCU | DCU | DQE | RSE | RSE |
Industry STD Term | SSOP | VSSOP | VSSOP | VSSOP | X2SON | UQFN | UQFN |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PSSO-N | S-PQFP-N | S-PQFP-N |
Package QTY | 3000 | 3000 | 3000 | 250 | 5000 | 5000 | 5000 |
Carrier | LARGE T&R | LARGE T&R | LARGE T&R | SMALL T&R | LARGE T&R | LARGE T&R | LARGE T&R |
Device Marking | N74 | N74Q | N74R | N74Q | DP | DP | DP |
Width (mm) | 2.8 | 2 | 2 | 2 | 1 | 1.5 | 1.5 |
Length (mm) | 2.95 | 2.3 | 2.3 | 2.3 | 1.4 | 1.5 | 1.5 |
Thickness (mm) | 1.29 | .85 | .85 | .85 | .37 | .55 | .55 |
Pitch (mm) | .65 | .5 | .5 | .5 | .35 | .5 | .5 |
Max Height (mm) | 1.3 | .9 | .9 | .9 | .4 | .6 | .6 |
Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | SN74LVC1G74DCTR | SN74LVC1G74DCUR | SN74LVC1G74DCURG4 | SN74LVC1G74DCUT | SN74LVC1G74DQER | SN74LVC1G74RSE2 | SN74LVC1G74RSER |
---|---|---|---|---|---|---|---|
3-State Output | No | No | No | No | No | No | No |
Bits | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
F @ Nom Voltage(Max), Mhz | 150 | 150 | 150 | 150 | 150 | 150 | 150 |
Gate Type | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP | FLIP-FLOP |
ICC @ Nom Voltage(Max), mA | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 | 0.01 |
Logic | True | True | True | True | True | True | True |
Operating Temperature Range, C | -40 to 125 | -40 to 125 | -40 to 125 | -40 to 125 | -40 to 125 | -40 to 125 | -40 to 125 |
Output Drive (IOL/IOH)(Max), mA | 32/-32 | 32/-32 | 32/-32 | 32/-32 | 32/-32 | 32/-32 | 32/-32 |
Package Group | SM8 | VSSOP | VSSOP | VSSOP | X2SON | UQFN | UQFN |
Package Size: mm2:W x L, PKG | 8SM8: 12 mm2: 4 x 2.95(SM8) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8VSSOP: 6 mm2: 3.1 x 2(VSSOP) | 8X2SON: 1 mm2: 1 x 1.4(X2SON) | 8UQFN: 2 mm2: 1.5 x 1.5(UQFN) | 8UQFN: 2 mm2: 1.5 x 1.5(UQFN) |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Schmitt Trigger | No | No | No | No | No | No | No |
Special Features | Ioff,down translation to Vcc,low power | Ioff,down translation to Vcc,low power | Ioff,down translation to Vcc,low power | Ioff,down translation to Vcc,low power | Ioff,down translation to Vcc,low power | Ioff,down translation to Vcc,low power | Ioff,down translation to Vcc,low power |
Sub-Family | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop | D-Type Flip-Flop |
Technology Family | LVC | LVC | LVC | LVC | LVC | LVC | LVC |
VCC(Max), V | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 | 5.5 |
VCC(Min), V | 1.65 | 1.65 | 1.65 | 1.65 | 1.65 | 1.65 | 1.65 |
Voltage(Nom), V | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 | 1.8,2.5,3.3,5 |
tpd @ Nom Voltage(Max), ns | 13.4,7.1,5.9,4.1 | 13.4,7.1,5.9,4.1 | 13.4,7.1,5.9,4.1 | 13.4,7.1,5.9,4.1 | 13.4,7.1,5.9,4.1 | 13.4,7.1,5.9,4.1 | 13.4,7.1,5.9,4.1 |
Eco Plan
SN74LVC1G74DCTR | SN74LVC1G74DCUR | SN74LVC1G74DCURG4 | SN74LVC1G74DCUT | SN74LVC1G74DQER | SN74LVC1G74RSE2 | SN74LVC1G74RSER | |
---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Application Notes
- LVC Characterization InformationPDF, 114 Kb, File published: Dec 1, 1996
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices. - Use of the CMOS Unbuffered Inverter in Oscillator CircuitsPDF, 796 Kb, File published: Nov 6, 2003
CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly
Model Line
Series: SN74LVC1G74 (7)
Manufacturer's Classification
- Semiconductors> Logic> Little Logic