Datasheet Texas Instruments SN74LVTH162245

ManufacturerTexas Instruments
SeriesSN74LVTH162245
Datasheet Texas Instruments SN74LVTH162245

3.3-V ABT 16-Bit Bus Transceivers With 3-State Outputs

Datasheets

3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS--SN74LVTH162245 datasheet
PDF, 948 Kb, Revision: Q, File published: Nov 1, 2006
Extract from the document

Prices

Status

74LVTH162245DGGRG474LVTH162245DLRG474LVTH162245GRDR74LVTH162245GRE474LVTH162245ZQLR74LVTH162245ZRDRSN74LVTH162245DGGRSN74LVTH162245DLSN74LVTH162245DLG4SN74LVTH162245DLRSN74LVTH162245KR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Obsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNoNoNoNoNo

Packaging

74LVTH162245DGGRG474LVTH162245DLRG474LVTH162245GRDR74LVTH162245GRE474LVTH162245ZQLR74LVTH162245ZRDRSN74LVTH162245DGGRSN74LVTH162245DLSN74LVTH162245DLG4SN74LVTH162245DLRSN74LVTH162245KR
N1234567891011
Pin4848544856544848484856
Package TypeDGGDLGRDDGGZQLZRDDGGDLDLDLGQL
Industry STD TermTSSOPSSOPBGA MICROSTAR JUNIORTSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORTSSOPSSOPSSOPSSOPBGA MICROSTAR JUNIOR
JEDEC CodeR-PDSO-GR-PDSO-GR-PBGA-NR-PDSO-GR-PBGA-NR-PBGA-NR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PBGA-N
Package QTY20001000200010001000200025251000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&RTUBETUBELARGE T&R
Device MarkingLVTH162245LVTH162245LVTH162245LL2245LL2245LVTH162245LVTH162245LVTH162245LVTH162245
Width (mm)6.17.495.56.14.55.56.17.497.497.494.5
Length (mm)12.515.88812.57812.515.8815.8815.887
Thickness (mm)1.152.59.81.15.75.81.152.592.592.59.75
Pitch (mm).5.635.8.5.65.8.5.635.635.635.65
Max Height (mm)1.22.791.21.211.21.22.792.792.791
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / Models74LVTH162245DGGRG4
74LVTH162245DGGRG4
74LVTH162245DLRG4
74LVTH162245DLRG4
74LVTH162245GRDR
74LVTH162245GRDR
74LVTH162245GRE4
74LVTH162245GRE4
74LVTH162245ZQLR
74LVTH162245ZQLR
74LVTH162245ZRDR
74LVTH162245ZRDR
SN74LVTH162245DGGR
SN74LVTH162245DGGR
SN74LVTH162245DL
SN74LVTH162245DL
SN74LVTH162245DLG4
SN74LVTH162245DLG4
SN74LVTH162245DLR
SN74LVTH162245DLR
SN74LVTH162245KR
SN74LVTH162245KR
Approx. Price (US$)0.52 | 1ku0.52 | 1ku
Bits161616161616161616
Bits(#)1616
F @ Nom Voltage(Max), Mhz160160160160160160160160160
F @ Nom Voltage(Max)(Mhz)160160
ICC @ Nom Voltage(Max), mA555555555
ICC @ Nom Voltage(Max)(mA)55
Input TypeTTL/CMOSTTL/CMOS
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-32/64-32/64-32/64-32/64-32/64-32/64-32/64-32/64-32/64
Output Drive (IOL/IOH)(Max)(mA)-32/64-32/64
Output TypeLVTTLLVTTL
Package GroupTSSOPSSOPBGA MICROSTAR JUNIORTSSOPBGA MICROSTAR JUNIORBGA MICROSTAR JUNIORTSSOPSSOPSSOPSSOPBGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
Package Size: mm2:W x L (PKG)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)56BGA MICROSTAR JUNIOR: 32 mm2: 4.5 x 7(BGA MICROSTAR JUNIOR)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNoNoNoNoNo
Technology FamilyLVTLVTLVTLVTLVTLVTLVTLVTLVTLVTLVT
VCC(Max), V3.63.63.63.63.63.63.63.63.6
VCC(Max)(V)3.63.6
VCC(Min), V2.72.72.72.72.72.72.72.72.7
VCC(Min)(V)2.72.7
Voltage(Nom), V3.33.33.33.33.33.33.33.33.3
Voltage(Nom)(V)3.33.3
tpd @ Nom Voltage(Max), ns3.33.33.33.33.33.33.33.33.3
tpd @ Nom Voltage(Max)(ns)3.33.3

Eco Plan

74LVTH162245DGGRG474LVTH162245DLRG474LVTH162245GRDR74LVTH162245GRE474LVTH162245ZQLR74LVTH162245ZRDRSN74LVTH162245DGGRSN74LVTH162245DLSN74LVTH162245DLG4SN74LVTH162245DLRSN74LVTH162245KR
RoHSCompliantCompliantNot CompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantNot Compliant
Pb FreeNoNo

Application Notes

  • LVT Family Characteristics (Rev. A)
    PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
    To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
  • LVT-to-LVTH Conversion
    PDF, 84 Kb, File published: Dec 8, 1998
    Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
  • Bus-Hold Circuit
    PDF, 418 Kb, File published: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, File published: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)
    PDF, 105 Kb, Revision: A, File published: Aug 1, 1997
    The spectrum of bus-interface devices with damping resistors or balanced/light output drive currently offered by various logic vendors is confusing at best. Inconsistencies in naming conventions and methods used for implementation make it difficult to identify the best solution for a given application. This report attempts to clarify the issue by looking at several vendors? approaches and discussi
  • Understanding Advanced Bus-Interface Products Design Guide
    PDF, 253 Kb, File published: May 1, 1996
  • Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices
    PDF, 209 Kb, File published: May 10, 2002
    Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
  • Live Insertion
    PDF, 150 Kb, File published: Oct 1, 1996
    Many applications require the ability to exchange modules in electronic systems without removing the supply voltage from the module (live insertion). For example an electronic telephone exchange must always remain operational even during module maintenance and repair. To avoid damaging components additional circuitry modifications are necessary. This document describes in detail the phenomena tha
  • Input and Output Characteristics of Digital Integrated Circuits
    PDF, 1.7 Mb, File published: Oct 1, 1996
    This report contains a comprehensive collection of the input and output characteristic curves of typical integrated circuits from various logic families. These curves go beyond the information given in data sheets by providing additional details regarding the characteristics of the components. This knowledge is particularly useful when for example a decision must be made as to which circuit shou

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Standard Transceiver