Datasheet Texas Instruments SN74LVTH244A

Manufacturer	Texas Instruments
Series	SN74LVTH244A

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Parametrics

Parameters / Models	SN74LVTH244ADB	SN74LVTH244ADBG4	SN74LVTH244ADBLE	SN74LVTH244ADBR	SN74LVTH244ADBRE4	SN74LVTH244ADBRG4	SN74LVTH244ADW	SN74LVTH244ADWE4	SN74LVTH244ADWG4	SN74LVTH244ADWR	SN74LVTH244ADWRE4	SN74LVTH244ADWRG4	SN74LVTH244AGQNR	SN74LVTH244ANSR	SN74LVTH244ANSRG4	SN74LVTH244APW	SN74LVTH244APWG4	SN74LVTH244APWLE	SN74LVTH244APWR	SN74LVTH244APWRE4	SN74LVTH244APWRG4	SN74LVTH244ARGYR	SN74LVTH244ARGYRG4	SN74LVTH244AZQNR
Approx. Price (US$)			0.24 | 1ku										0.24 | 1ku					0.24 | 1ku
Bits	8	8		8	8	8	8	8	8	8	8	8		8	8	8	8		8	8	8	8	8	8
Bits(#)			8										8					8
F @ Nom Voltage(Max), Mhz	160	160		160	160	160	160	160	160	160	160	160		160	160	160	160		160	160	160	160	160	160
F @ Nom Voltage(Max)(Mhz)			160										160					160
ICC @ Nom Voltage(Max), mA	0.005	0.005		0.005	0.005	0.005	0.005	0.005	0.005	0.005	0.005	0.005		0.005	0.005	0.005	0.005		0.005	0.005	0.005	0.005	0.005	0.005
ICC @ Nom Voltage(Max)(mA)			0.005										0.005					0.005
Input Type			TTL										TTL					TTL
Operating Temperature Range, C	-40 to 85	-40 to 85		-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85		-40 to 85	-40 to 85	-40 to 85	-40 to 85		-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Operating Temperature Range(C)			-40 to 85										-40 to 85					-40 to 85
Output Drive (IOL/IOH)(Max), mA	-32/64	-32/64		-32/64	-32/64	-32/64	-32/64	-32/64	-32/64	-32/64	-32/64	-32/64		-32/64	-32/64	-32/64	-32/64		-32/64	-32/64	-32/64	-32/64	-32/64	-32/64
Output Drive (IOL/IOH)(Max)(mA)			-32/64										-32/64					-32/64
Output Type			LVTTL										LVTTL					LVTTL
Package Group	SSOP	SSOP	SSOP	SSOP	SSOP	SSOP	SOIC	SOIC	SOIC	SOIC	SOIC	SOIC	BGA MICROSTAR JUNIOR SO SOIC SSOP TSSOP VQFN	SO	SO	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP	TSSOP	VQFN	VQFN	BGA MICROSTAR JUNIOR
Package Size: mm2:W x L, PKG	20SSOP: 56 mm2: 7.8 x 7.2(SSOP)	20SSOP: 56 mm2: 7.8 x 7.2(SSOP)		20SSOP: 56 mm2: 7.8 x 7.2(SSOP)	20SSOP: 56 mm2: 7.8 x 7.2(SSOP)	20SSOP: 56 mm2: 7.8 x 7.2(SSOP)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)	20SOIC: 132 mm2: 10.3 x 12.8(SOIC)		20SO: 98 mm2: 7.8 x 12.6(SO)	20SO: 98 mm2: 7.8 x 12.6(SO)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)		20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)	20VQFN: 16 mm2: 3.5 x 4.5(VQFN)	20VQFN: 16 mm2: 3.5 x 4.5(VQFN)	20BGA MICROSTAR JUNIOR: 12 mm2: 3 x 4(BGA MICROSTAR JUNIOR)
Package Size: mm2:W x L (PKG)			20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)										20BGA MICROSTAR JUNIOR: 12 mm2: 3 x 4(BGA MICROSTAR JUNIOR) 20VQFN: 16 mm2: 3.5 x 4.5(VQFN) 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) 20SO: 98 mm2: 7.8 x 12.6(SO) 20SOIC: 132 mm2: 10.3 x 12.8(SOIC)					20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No	No
Technology Family	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT	LVT
VCC(Max), V	3.6	3.6		3.6	3.6	3.6	3.6	3.6	3.6	3.6	3.6	3.6		3.6	3.6	3.6	3.6		3.6	3.6	3.6	3.6	3.6	3.6
VCC(Max)(V)			3.6										3.6					3.6
VCC(Min), V	2.7	2.7		2.7	2.7	2.7	2.7	2.7	2.7	2.7	2.7	2.7		2.7	2.7	2.7	2.7		2.7	2.7	2.7	2.7	2.7	2.7
VCC(Min)(V)			2.7										2.7					2.7
Voltage(Nom), V	3.3	3.3		3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3	3.3		3.3	3.3	3.3	3.3		3.3	3.3	3.3	3.3	3.3	3.3
Voltage(Nom)(V)			3.3										3.3					3.3
tpd @ Nom Voltage(Max), ns	3.5	3.5		3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5	3.5		3.5	3.5	3.5	3.5		3.5	3.5	3.5	3.5	3.5	3.5
tpd @ Nom Voltage(Max)(ns)			3.5										3.5					3.5

Eco Plan

Application Notes

• Download
  LVT Family Characteristics (Rev. A)
  PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
  To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
• Download
  LVT-to-LVTH Conversion
  PDF, 84 Kb, File published: Dec 8, 1998
  Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
• Download
  Bus-Hold Circuit
  PDF, 418 Kb, File published: Feb 5, 2001
  When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

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Manufacturer's Classification

• Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver