Datasheet Texas Instruments SN74LVTH652

Manufacturer	Texas Instruments
Series	SN74LVTH652

3.3-V ABT Octal Bus Transceivers And Registers With 3-State Outputs

Datasheets

PDF, 868 Kb, Revision: F, File published: Oct 13, 2003

Extract from the document

	SN74LVTH652DBLE	SN74LVTH652DW	SN74LVTH652PW	SN74LVTH652PWLE	SN74LVTH652PWR
Lifecycle Status	Obsolete (Manufacturer has discontinued the production of the device)	Active (Recommended for new designs)	Active (Recommended for new designs)	Obsolete (Manufacturer has discontinued the production of the device)	Active (Recommended for new designs)
Manufacture's Sample Availability	No	No	No	No	No

	SN74LVTH652DBLE	SN74LVTH652DW	SN74LVTH652PW	SN74LVTH652PWLE	SN74LVTH652PWR
N	1	2	3	4	5
Pin	24	24	24	24	24
Package Type	DB	DW	PW	PW	PW
Industry STD Term	SSOP	SOIC	TSSOP	TSSOP	TSSOP
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G
Width (mm)	5.3	7.5	4.4	4.4	4.4
Length (mm)	8.2	15.4	7.8	7.8	7.8
Thickness (mm)	1.95	2.35	1	1	1
Pitch (mm)	.65	1.27	.65	.65	.65
Max Height (mm)	2	2.65	1.2	1.2	1.2
Mechanical Data	Download	Download	Download	Download	Download
Package QTY		25	60		2000
Carrier		TUBE	TUBE		LARGE T&R
Device Marking		LVTH652	LXH652		LXH652

Parameters / Models	SN74LVTH652DBLE	SN74LVTH652DW	SN74LVTH652PW	SN74LVTH652PWLE	SN74LVTH652PWR
Approx. Price (US$)	0.88 \| 1ku			0.88 \| 1ku
Bits		8	8		8
Bits(#)	8			8
F @ Nom Voltage(Max), Mhz		160	160		160
F @ Nom Voltage(Max)(Mhz)	160			160
ICC @ Nom Voltage(Max), mA		0.005	0.005		0.005
ICC @ Nom Voltage(Max)(mA)	0.005			0.005
Input Type	TTL/CMOS			TTL/CMOS
Operating Temperature Range, C		-40 to 85	-40 to 85		-40 to 85
Operating Temperature Range(C)	-40 to 85			-40 to 85
Output Drive (IOL/IOH)(Max), mA		-32/64	-32/64		-32/64
Output Drive (IOL/IOH)(Max)(mA)	-32/64			-32/64
Output Type	LVTTL			LVTTL
Package Group	SOIC TSSOP TVSOP	SOIC	TSSOP	TSSOP	TSSOP
Package Size: mm2:W x L, PKG		24SOIC: 160 mm2: 10.3 x 15.5(SOIC)	24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)		24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)
Package Size: mm2:W x L (PKG)	24TVSOP: 32 mm2: 6.4 x 5(TVSOP) 24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP) 24SOIC: 160 mm2: 10.3 x 15.5(SOIC)			24TSSOP: 50 mm2: 6.4 x 7.8(TSSOP)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog
Schmitt Trigger	No	No	No	No	No
Technology Family	LVT	LVT	LVT	LVT	LVT
VCC(Max), V		3.6	3.6		3.6
VCC(Max)(V)	3.6			3.6
VCC(Min), V		2.7	2.7		2.7
VCC(Min)(V)	2.7			2.7
Voltage(Nom), V		3.3	3.3		3.3
Voltage(Nom)(V)	3.3			3.3
tpd @ Nom Voltage(Max), ns		4.7	4.7		4.7
tpd @ Nom Voltage(Max)(ns)	4.7			4.7

	SN74LVTH652DBLE	SN74LVTH652DW	SN74LVTH652PW	SN74LVTH652PWLE	SN74LVTH652PWR
RoHS	Not Compliant	Compliant	Compliant	Not Compliant	Compliant
Pb Free	No	No

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LVT Family Characteristics (Rev. A)
PDF, 98 Kb, Revision: A, File published: Mar 1, 1998
To address the need for a complete low-voltage interface solution, Texas Instruments has developed a new generation of logic devices capable of mixed-mode operation. The LVT series relies on a state-of-the-art submicron BiCMOS process to provide up to a 90% reduction in static power dissipation over ABT. LVT devices solve the system need for a transparent seam between the low-voltage and 5-V secti
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LVT-to-LVTH Conversion
PDF, 84 Kb, File published: Dec 8, 1998
Original LVT devices that have bus hold have been redesigned to add the High-Impedance State During Power Up and Power Down feature. Additional devices with and without bus hold have been added to the LVT product line. Design guidelines and issues related to the bus-hold features, switching characteristics, and timing requirements are discussed.
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Bus-Hold Circuit
PDF, 418 Kb, File published: Feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of

Series: SN74LVTH652 (5)