Datasheet Texas Instruments SN74S37
| Manufacturer | Texas Instruments |
| Series | SN74S37 |
Quad 2-input positive-NAND buffers
Datasheets
Quadruple 2-Input Positive-NAND Buffers datasheet
PDF, 1.0 Mb, File published: Mar 1, 1988
Extract from the document
Prices
Status
| SN74S37D | SN74S37N | SN74S37N3 | |
|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No | No | No |
Packaging
| SN74S37D | SN74S37N | SN74S37N3 | |
|---|---|---|---|
| N | 1 | 2 | 3 |
| Pin | 14 | 14 | 14 |
| Package Type | D | N | N |
| Industry STD Term | SOIC | PDIP | PDIP |
| JEDEC Code | R-PDSO-G | R-PDIP-T | R-PDIP-T |
| Package QTY | 50 | 25 | |
| Carrier | TUBE | TUBE | |
| Device Marking | S37 | SN74S37N | |
| Width (mm) | 3.91 | 6.35 | 6.35 |
| Length (mm) | 8.65 | 19.3 | 19.3 |
| Thickness (mm) | 1.58 | 3.9 | 3.9 |
| Pitch (mm) | 1.27 | 2.54 | 2.54 |
| Max Height (mm) | 1.75 | 5.08 | 5.08 |
| Mechanical Data | Download | Download | Download |
Parametrics
| Parameters / Models | SN74S37D | SN74S37N | SN74S37N3 |
|---|---|---|---|
| Approx. Price (US$) | 1.00 | 1ku | ||
| Bits | 4 | 4 | |
| Bits(#) | 4 | ||
| F @ Nom Voltage(Max), Mhz | 50 | 50 | |
| F @ Nom Voltage(Max)(Mhz) | 50 | ||
| ICC @ Nom Voltage(Max), mA | 0.054 | 0.054 | |
| ICC @ Nom Voltage(Max)(mA) | 0.054 | ||
| Input Type | TTL | ||
| Operating Temperature Range, C | 0 to 70 | 0 to 70 | |
| Operating Temperature Range(C) | 0 to 70 | ||
| Output Drive (IOL/IOH)(Max), mA | 12/-48 | 12/-48 | |
| Output Drive (IOL/IOH)(Max)(mA) | 12/-48 | ||
| Output Type | TTL | ||
| Package Group | SOIC | PDIP | PDIP |
| Package Size: mm2:W x L, PKG | 14SOIC: 52 mm2: 6 x 8.65(SOIC) | See datasheet (PDIP) | |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) | ||
| Rating | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No |
| Technology Family | S | S | S |
| VCC(Max), V | 5.25 | 5.25 | |
| VCC(Max)(V) | 5.25 | ||
| VCC(Min), V | 4.75 | 4.75 | |
| VCC(Min)(V) | 4.75 | ||
| Voltage(Nom), V | 5 | 5 | |
| Voltage(Nom)(V) | 5 | ||
| tpd @ Nom Voltage(Max), ns | 22 | 22 | |
| tpd @ Nom Voltage(Max)(ns) | 22 |
Eco Plan
Model Line
Manufacturer's Classification
- Semiconductors> Logic> Gate> NAND Gate
