Datasheet Texas Instruments TLV1548-EP
Manufacturer | Texas Instruments |
Series | TLV1548-EP |
Enhanced Product Low-Voltage 10-Bit Adc W/Serial Control & 8 Analog Input
Datasheets
Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input datasheet
PDF, 686 Kb, Revision: A, File published: Dec 5, 2003
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Status
TLV1548QDBREP | V62/04618-01XE | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No |
Packaging
TLV1548QDBREP | V62/04618-01XE | |
---|---|---|
N | 1 | 2 |
Pin | 20 | 20 |
Package Type | DB | DB |
Industry STD Term | SSOP | SSOP |
JEDEC Code | R-PDSO-G | R-PDSO-G |
Package QTY | 2000 | 2000 |
Carrier | LARGE T&R | LARGE T&R |
Device Marking | 1548QE | 1548QE |
Width (mm) | 5.3 | 5.3 |
Length (mm) | 7.2 | 7.2 |
Thickness (mm) | 1.95 | 1.95 |
Pitch (mm) | .65 | .65 |
Max Height (mm) | 2 | 2 |
Mechanical Data | Download | Download |
Parametrics
Parameters / Models | TLV1548QDBREP | V62/04618-01XE |
---|---|---|
# Input Channels | 8 | 8 |
Analog Voltage AVDD(Max), V | 5.5 | 5.5 |
Analog Voltage AVDD(Min), V | 2.7 | 2.7 |
Architecture | SAR | SAR |
Digital Supply(Max), V | 5.5 | 5.5 |
Digital Supply(Min), V | 2.7 | 2.7 |
INL(Max), +/-LSB | 1 | 1 |
Interface | SPI | SPI |
Operating Temperature Range, C | -40 to 125 | -40 to 125 |
Package Group | SSOP | SSOP |
Package Size: mm2:W x L, PKG | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) | 20SSOP: 56 mm2: 7.8 x 7.2(SSOP) |
Power Consumption(Typ), mW | 1.05 | 1.05 |
Rating | HiRel Enhanced Product | HiRel Enhanced Product |
Reference Mode | Ext | Ext |
Resolution, Bits | 10 | 10 |
Sample Rate (max), SPS | 85kSPS | 85kSPS |
Eco Plan
TLV1548QDBREP | V62/04618-01XE | |
---|---|---|
RoHS | Compliant | Compliant |
Application Notes
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: TLV1548-EP (2)
Manufacturer's Classification
- Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters