Datasheet Texas Instruments TLV1548-Q1

ManufacturerTexas Instruments
SeriesTLV1548-Q1
Datasheet Texas Instruments TLV1548-Q1

Automotive Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input

Datasheets

Low-Voltage 10-Bit Analog-to-Digital Converter w/Serial Control & 8 Analog Input datasheet
PDF, 532 Kb, Revision: B, File published: Apr 30, 2008
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Prices

Status

TLV1548QDBRG4Q1TLV1548QDBRQ1
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYes

Packaging

TLV1548QDBRG4Q1TLV1548QDBRQ1
N12
Pin2020
Package TypeDBDB
Industry STD TermSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-G
Package QTY20002000
CarrierLARGE T&RLARGE T&R
Device Marking1548Q11548Q1
Width (mm)5.35.3
Length (mm)7.27.2
Thickness (mm)1.951.95
Pitch (mm).65.65
Max Height (mm)22
Mechanical DataDownloadDownload

Parametrics

Parameters / ModelsTLV1548QDBRG4Q1
TLV1548QDBRG4Q1
TLV1548QDBRQ1
TLV1548QDBRQ1
# Input Channels88
Analog Voltage AVDD(Max), V5.55.5
Analog Voltage AVDD(Min), V2.72.7
ArchitectureSARSAR
Digital Supply(Max), V5.55.5
Digital Supply(Min), V2.72.7
INL(Max), +/-LSB11
Input Range(Max), V5.55.5
Input TypeSingle-EndedSingle-Ended
Integrated FeaturesN/AN/A
InterfaceSPISPI
Multi-Channel ConfigurationMultiplexedMultiplexed
Operating Temperature Range, C-40 to 125-40 to 125
Package GroupSSOPSSOP
Package Size: mm2:W x L, PKG20SSOP: 56 mm2: 7.8 x 7.2(SSOP)20SSOP: 56 mm2: 7.8 x 7.2(SSOP)
Power Consumption(Typ), mW1.051.05
RatingAutomotiveAutomotive
Reference ModeExtExt
Resolution, Bits1010
SINAD, dBN/AN/A
Sample Rate (max), SPS85kSPS85kSPS
Sample Rate(Max), MSPS0.0850.085
THD(Typ), dBN/AN/A

Eco Plan

TLV1548QDBRG4Q1TLV1548QDBRQ1
RoHSCompliantCompliant

Application Notes

  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Model Line

Series: TLV1548-Q1 (2)

Manufacturer's Classification

  • Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)