Datasheet Texas Instruments TMS320C6711D
| Manufacturer | Texas Instruments |
| Series | TMS320C6711D |
Floating-Point Digital Signal Processors
Datasheets
TMS320C6711D Floating-Point Digital Signal Processor datasheet
PDF, 1.4 Mb, Revision: B, File published: Jun 30, 2006
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Prices
Status
| TMS320C6711DGDP200 | TMS320C6711DGDP250 | TMS320C6711DZDP200 | TMS320C6711DZDP250 | TMS32C6711DGDPA167 | TMS32C6711DZDPA167 | |
|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes | No | No | Yes | No | No |
Packaging
| TMS320C6711DGDP200 | TMS320C6711DGDP250 | TMS320C6711DZDP200 | TMS320C6711DZDP250 | TMS32C6711DGDPA167 | TMS32C6711DZDPA167 | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 272 | 272 | 272 | 272 | 272 | 272 |
| Package Type | GDP | GDP | ZDP | ZDP | GDP | ZDP |
| Industry STD Term | BGA | BGA | BGA | BGA | BGA | BGA |
| JEDEC Code | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N | S-PBGA-N |
| Package QTY | 40 | 40 | 40 | 40 | 40 | 40 |
| Carrier | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | JEDEC TRAY (5+1) | |||
| Device Marking | TMS320C6711 | DGDP | TMS320C6711 | DZDP | GDP | ZDP |
| Width (mm) | 27 | 27 | 27 | 27 | 27 | 27 |
| Length (mm) | 27 | 27 | 27 | 27 | 27 | 27 |
| Thickness (mm) | 1.78 | 1.78 | 1.78 | 1.78 | 1.78 | 1.78 |
| Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 |
| Max Height (mm) | 2.57 | 2.57 | 2.57 | 2.57 | 2.57 | 2.57 |
| Mechanical Data | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | TMS320C6711DGDP200 | TMS320C6711DGDP250 | TMS320C6711DZDP200 | TMS320C6711DZDP250 | TMS32C6711DGDPA167 | TMS32C6711DZDPA167 |
|---|---|---|---|---|---|---|
| DSP | 1 C67x | 1 C67x | 1 C67x | 1 C67x | 1 C67x | 1 C67x |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Eco Plan
| TMS320C6711DGDP200 | TMS320C6711DGDP250 | TMS320C6711DZDP200 | TMS320C6711DZDP250 | TMS32C6711DGDPA167 | TMS32C6711DZDPA167 | |
|---|---|---|---|---|---|---|
| RoHS | See ti.com | See ti.com | Compliant | Compliant | See ti.com | Compliant |
| Pb Free | Yes | Yes | Yes |
Application Notes
- Migrating From TMS320C6211B/C6711/C6711B/C6711C to TMS320C6711D (Rev. H)PDF, 155 Kb, Revision: H, File published: Nov 10, 2005
This document describes issues of interest related to migration from the Texas Instruments TMS320C6211B/C6711/C6711B GFN package and TMS320C6711C GDP package to the TMS320C6711D digital signal processor (DSP) GDP package. The objective of this document is to indicate differences between these devices. Functions that are identical between these devices are not included. For detailed information on - TMS320C6711D, C6712D, C6713B Power Consumption Summary (Rev. A)PDF, 93 Kb, Revision: A, File published: May 31, 2004
This document discusses the power consumption of the Texas Instruments TMS320C6711D, TMS320C6712D, and TMS320C6713B digital signal processors (DSPs). Power consumption on these devices is highly application dependent, so a spreadsheet is provided to model power consumption for a user's application. To get good results from the spreadsheet, realistic usage parameters must be entered. The low core v - TMS320C621x/TMS320C671x EDMA ArchitecturePDF, 255 Kb, File published: Mar 5, 2004
The enhanced DMA (EDMA) controller of the TMS320C621xв„ў/TMS320C671xв„ў device is a highly efficient data transfer engine. To maximize bandwidth, minimize transfer interference, and fully utilize the resources of the EDMA, it is crucial to understand the architecture of the engine. Transfer requests (TRs) originate from many requestors, including sixteen programmable EDMA channels, the lev - TMS320C621x/671x EDMA Performance DataPDF, 233 Kb, File published: Mar 5, 2004
The enhanced DMA (EDMA) controller of the TMS320C621xв„ў/TMS320C671xв„ў devices is a highly efficient data transfer engine, capable of maintaining transfers at up to 1800 MB/sec at a 225 MHz CPU clock frequency. This document details actual bandwidth achieved under various operating conditions. Ideal transfer bandwidth is explored in TMS320C6000 EDMA IO Scheduling and Performance (S - TMS320C6000 EDMA IO Scheduling and PerformancePDF, 269 Kb, File published: Mar 5, 2004
The enhanced DMA (EDMA) is a highly efficient and parallel data transfer engine. To make the best use of its resources, it is necessary to understand the architecture and schedule transfers intelligently. This document details how to summarize, analyze, and schedule system traffic to produce efficient designs. An example audio/video system is presented and analyzed in full. Finally, EDMA performan - Thermal Considerations for the DM64xx, DM64x, and C6000 DevicesPDF, 127 Kb, File published: May 20, 2007
As integrated circuit (IC) components become more complex, the challenge of producing an end product with superior thermal performance increases. Thermal performance is a system level concern, impacted by IC packaging as well as by printed circuit board (PCB) design. This application report addresses the thermal considerations for the TMS320DM64xx, TMS320DM64x, and TMS320C6000в„ў DSP devices. - Introduction to TMS320C6000 DSP OptimizationPDF, 535 Kb, File published: Oct 6, 2011
The TMS320C6000™ Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications. However to fully leverage the architectural features that C6000™ processors offer code optimization may be required. First this document reviews five key concepts in understanding the C6000 DSP architecture and optimization. Then
Model Line
Series: TMS320C6711D (6)
Manufacturer's Classification
- Semiconductors> Processors> Digital Signal Processors> C6000 DSP> Other C6000 DSP
