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Application Notes

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  Methods for Measuring Op Amp Settling Time &mdash AN10
  PDF, 277 Kb, File published: Jul 1, 1985
  The AN10 begins with a survey of methods for measuring op amp settling time. This commentary develops into circuits for measuring settling time to 0.0005%. Construction details and results are presented. Appended sections cover oscilloscope overload limitations and amplifier frequency compensation.
  Extract from the document

  Application Note 10
  July 1985
  Methods of Measuring Op Amp Settling Time
  Jim Williams
  Servo, DAC and data acquisition amplifiers all require
  good dynamic response. In particular, the time required
  for an amplifier to settle to final value after an input step
  is especially important. This specification allows setting
  a circuit’s timing margins with confidence that the data
  produced is accurate. The settling time is the total length
  of time from input step application until the amplifier remains within a specified error band around the final value. 10mV or less for a 10V step is of interest. No generalpurpose pulse generator is meant to hold output amplitude
  and noise within these limits. Generator output-caused
  aberration appearing at the oscilloscope probe will be
  indistinguishable from amplifier output movement, producing unreliable results. The oscilloscope connection
  presents additional problems. As probe capacitance rises,
  AC loading of the resistor junction will influence observed
  settling waveforms. The 20pF probe shown alleviates this
  problem but its 10X attenuation sacrifices oscilloscope
  gain. 1X probes are not suitable because of their excessive
  input capacitance. An active 1X FET probe will work, but
  another issue remains. Figure 1 shows one way to measure amplifier settling
  time (see References 1, 2, and 3). The circuit uses the
  “false sum node” technique. The resistors and amplifier …

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  High Speed Comparator Techniques &mdash AN13
  PDF, 1.1 Mb, File published: Apr 1, 1985
  The AN13 is an extensive discussion of the causes and cures of problems in very high speed comparator circuits. A separate applications section presents circuits, including a 0.025% accurate 1Hz to 30MHz V/F converter, a 200ns 0.01% sample-hold and a 10MHz fiber-optic receiver. Five appendices covering related topics complete this note.
  Extract from the document

  Application Note 13
  April 1985
  High Speed Comparator Techniques
  Jim Williams
  INTRODUCTION
  Comparators may be the most underrated and underutilized monolithic linear component. This is unfortunate
  because comparators are one of the most flexible and
  universally applicable components available. In large
  measure the lack of recognition is due to the IC op amp,
  whose versatility allows it to dominate the analog design
  world. Comparators are frequently perceived as devices,
  which crudely express analog signals in digital form—a
  1-bit A/D converter. Strictly speaking, this viewpoint is
  correct. It is also wastefully constrictive in its outlook.
  Comparators don’t “just compare” in the same way that
  op amps don’t “just amplify”.
  Comparators, in particular high speed comparators, can
  be used to implement linear circuit functions which are
  as sophisticated as any op amp-based circuit. Judiciously
  combining a fast comparator with op amps is a key to
  achieving high performance results. In general, op ampbased circuits capitalize on their ability to close a feedback
  loop with precision. Ideally, such loops are maintained
  continuously over time. Conversely, comparator circuits …

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  Designs for High Performance Voltage-to-Frequency Converters &mdash AN14
  PDF, 387 Kb, File published: Mar 1, 1986
  A variety of high performance V/F circuits is presented. Included are a 1Hz to 100MHz design, a quartz-stabilized type and a 0.0007% linear unit. Other circuits feature 1.5V operation, sine wave output an nonlinear transfer functions. A separate section examines the trade-offs and advantages of various approaches to V/F conversion.
  Extract from the document

  Application Note 14
  March 1986
  Designs for High Performance Voltage-to-Frequency
  Converters
  Jim Williams
  Monolithic, modular and hybrid technologies have been
  used to implement voltage-to-frequency converters. A
  number of types are commercially available and overall
  performance is adequate to meet many requirements. In
  many cases, however, very high performance or special
  characteristics are required and available units will not work.
  In these instances V→F circuits specifically optimized for
  the desired parameters(s) are required. This application
  note presents examples of circuits which offer substantially improved performance over commercially available
  V→Fs. Various approaches (see Box Section, “V→F
  Design Techniques”) permit improvements in speed, dynamic range, stability and linearity. Other circuits feature
  low voltage operation, sine wave output and deliberate
  nonlinear transfer functions.
  Ultra-High Speed 1Hz to 100MHz V→F Converter
  Figure 1’s circuit uses a variety of circuit methods to
  achieve wider dynamic range and higher speed than any
  commercial V→F. Rocketing along at 100MHz full-scale
  (10% overrange to 110MHz is provided), it leaves all other …

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  Risk Assessment Advice for High Reliability Amplifiers &mdash AN141
  PDF, 299 Kb, File published: Oct 7, 2013
  Extract from the document

  Application Note 141
  October 2013
  Risk Assessment Advice for High Reliability Amplifiers
  Tim Regan and James Mahoney Introduction
  In long life, high reliability systems, supplied power is
  provided only to essential circuitry. As a result many of
  the unpowered circuits may have voltages applied to inputs and outputs without proper supply biasing. As part
  of any diligent system safety risk assessment, a question
  often arises; will the unpowered components be damaged,
  degraded, or impair circuit performance under these
  abnormal operating conditions?
  The purpose of this article is to provide advice for what
  lies within the pins of several common amplifiers used in
  these applications. Most of the amplifiers of interest are the
  radiation hard amplifiers so indicated with a device prefix
  of RH. Another amplifier, the LT6016, is particularly robust
  with over, under and reversed polarity voltage conditions
  and is included for reference.
  With no power applied to the amplifier, forcing a voltage
  between two pins will cause a current to flow. The magnitude of this current differs from pin to pin and device to
  device. A curve tracer is used to show the current vs voltage
  characteristic when overdriving specific pin combinations.
  Referencing these curve trace plots will provide an indication of the magnitude of current flow for a particular …

• Download
  Power Gain Stages for Monolithic Amplifiers &mdash AN18
  PDF, 2.5 Mb, File published: Mar 1, 1986
  This note presents output state circuits which provide power gain for monolithic amplifiers. The circuits feature voltage gain, current gain, or both. Eleven designs are shown, and performance is summarized. A generalized method for frequency compensation appears in a separate section.
  Extract from the document

  Application Note 18
  March 1986
  Power Gain Stages for Monolithic Amplifiers
  Jim Williams
  Most monolithic amplifiers cannot supply more than a few
  hundred milliwatts of output power. Standard IC processing
  techniques set device supply levels at 36V, limiting available output swing. Additionally, supplying currents beyond
  tens of milliamperes requires large output transistors and
  causes undesirable IC power dissipation.
  Many applications, however, require greater output power
  than most monolithic amplifiers will deliver. When voltage
  or current gain (or both) is needed, a separate output
  stage is necessary. The power gain stage, sometimes
  called a “booster”, is usually placed within the monolithic
  amplifier’s feedback loop, preserving the IC’s low drift and
  stable gain characteristics. 150mA Output Stage
  Figure 1a shows the LTВ®1010 monolithic 150mA current
  booster placed within the feedback loop of a fast FET
  amplifier. At lower frequencies, the buffer is within the
  feedback loop so that its offset voltage and gain errors
  are negligible. At higher frequencies, feedback is through
  Cf, so that phase shift from the load capacitance acting
  against the buffer output resistance does not cause loop …

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  Applications for a Switched-Capacitor Instrumentation Building Block &mdash AN3
  PDF, 1.5 Mb, File published: Jul 1, 1985
  This application note describes a wide range of useful applications for the LTC1043 dual precision instrumentation switched capacitor building block. Some of the applications described are ultra high performance instrumentation amplifier, lock-in amplifier, wide range digitally controlled variable gain amplifier, relative humidity sensor signal conditioner, LVDT signal conditioner, charge pump F/V and V/F converters, 12-bit A/D converter and more.
  Extract from the document

  Application Note 3
  July 1985
  Applications for a Switched-Capacitor Instrumentation
  Building Block
  Jim Williams
  CMOS analog IC design is largely based on manipulation
  of charge. Switches and capacitors are the elements used
  to control and distribute the charge. Monolithic п¬Ѓlters, data
  converters and voltage converters rely on the excellent
  characteristics of IC CMOS switches. Because of the importance of switches in their circuits, CMOS designers have
  developed techniques to minimize switch induced errors,
  particularly those associated with stray capacitance and
  switch timing. Until now, these techniques have been used
  only in the internal construction of monolithic devices. A
  new device, the LTCВ®1043, makes these switches available
  for board-level use. Multi-pole switching and a self-driven,
  non-overlapping clock allow the device to be used in circuits
  which are impractical with other switches. Conceptually, the LTC1043 is simple. Figure 1 details its
  features. The oscillator, free-running at 200kHz, drives a
  non-overlapping clock. Placing a capacitor from Pin 16 to
  ground shifts the oscillator frequency downward to any
  desired point. The pin may also be driven from an external
  source, synchronizing the switches to external circuitry. …

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  Converting Light to Digits: LTC1099 Half Flash 8-Bit A/D Converter Digitizes Photodiode Array &mdash AN33
  PDF, 703 Kb, File published: Mar 2, 1989
  This application note describes a Linear Technology "Half-Flash" A/D converter, the LTC1099, being connected to a 256 element line scan photodiode array. This technology adapts itself to handheld (i.e., low power) bar code readers, as well as high resolution automated machine inspection applications.
• Download
  Using the LTC Op Amp Macromodels &mdash AN48
  PDF, 297 Kb, File published: Nov 8, 1991
  LTC's op amp macromodels are described in detail, along with the theory behind each model and complete schematics of each topology. Extended modeling topics are discussed, such as phase/frequency response modifications and asymmetric slew rate for JFET op amp models. LTC's macromodels are optimized for accuracy and fast simulation times. Simulation times can be further reduced by using streamlining techniques found throughout AN48.
  Extract from the document

  Application Note 48
  November 1991
  Using the LTC Op Amp Macromodels
  Getting the Most from SPICE and the LTC Library
  Walt Jung INTRODUCTION This application note is an overview discussion of the
  Linear Technology SPICE macromodel library. It assumes
  little if any prior knowledge of this software library or its
  history. However, it does assume familiarity with both the
  analog simulation program SPICE (or one of its many
  derivatives), and modern day op amps, including bipolar,
  JFET, and MOSFET amplifier technologies.
  Some Preliminary SPICE Facts of Life
  In the past few years, SPICE simulations have really begun
  to capture a high level of attention on the part of analog
  circuit designers. Perhaps this is due to more affordable
  high performance computers, or perhaps the time for
  simulation is now upon us. In any event, the bottom line is
  that IC vendors are now making macromodels for op amps
  available to their customers.
  For the analog circuit designer, there can be no better fate
  for simulations, viewing this situation in terms of which
  model to use. Designers no longer need worry about
  whether the third party supplier’s model can really cut it. …

• Download
  Some Techniques for Direct Digitization of Transducer Outputs &mdash AN7
  PDF, 297 Kb, File published: Feb 1, 1985
  Analog-to-digital conversion circuits which directly digitize low level transducer outputs, without DC preamplification, are presented. Covered are circuits which operate with thermocouples, strain gauges, humidity sensors, level transducers and other sensors.
  Extract from the document

  Application Note 7
  February 1985
  Some Techniques for Direct Digitization of Transducer Outputs
  Jim Williams
  Almost all transducers produce low level signals. Normally,
  high accuracy signal conditioning amplifiers are used to
  boost these outputs to levels which can easily drive cables,
  additional circuitry, or data converters. This practice raises
  the signal processing range well above the error floor,
  permitting high resolution over a wide dynamic range.
  Some emerging trends in transducer-based systems are
  causing the use of signal conditioning amplifiers to be
  reevaluated. While these amplifiers will always be useful,
  their utilization may not be as universal as it once was.
  In particular, many industrial transducer-fed systems are
  employing digital transmission of signals to eliminate
  noise-induced inaccuracies in long cable runs. Additionally, the increasing digital content of systems, along with
  pressures on board space and cost, make it desirable to
  digitize transducer outputs as far forward in the signal chain
  as possible. These trends point toward direct digitization
  of transducer outputs—a difficult task.
  Classical A/D conversion techniques emphasize high level
  input ranges. This allows LSB step size to be as large …

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  A Seven-Nanosecond Comparator for Single Supply Operation &mdash AN72
  PDF, 882 Kb, File published: May 1, 1998
  AN72 is an extensive discussion of the causes and cures of problems in very high speed comparator circuits. A separate applications section uses the 7ns LT1394 in V-to-F converters, crystal oscillators, clock skew generators, triggers, sampling configurations and a nanosecond pulse stretcher. Appendices cover related topics.
  Extract from the document

  Application Note 72
  May 1998
  A Seven-Nanosecond Comparator
  for Single Supply Operation
  Guidance for Putting Civilized Speed to Work
  Jim Williams INTRODUCTION
  In 1985 Linear Technology Corporation introduced the
  LT В®1016 Comparator. This device was the first readily
  usable, high speed TTL comparator. Previous ICs were
  either too slow or unstable, preventing widespread
  acceptance. The LT1016 was, and is, a highly successful
  product.
  Recent technology trends have emphasized low power,
  single supply operation. The LT1016, although capable of
  such operation, does not include ground in its input range.
  As such, it must be biased into its operating common
  mode range for practical single supply use. A new device,
  the LT1394, maintains the speed and application civility of
  its predecessor while including ground in its input operating range. Additionally, the new comparator is faster and
  pulls significantly lower operating current than the LT1016.
  This publication borrows shamelessly from earlier LTC
  efforts, while introducing new material.1 It approximates,
  affixes, appends, abridges, amends, abbreviates, abrogates, ameliorates and augments the previous work.2 …

Design Notes

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  Updated Operational Amplifier Selection Guide for Optimum Noise Performance &mdash DN140
  PDF, 74 Kb, File published: Oct 1, 1996
  Extract from the document

  Operational Amplifier Selection Guide for
  Optimum Noise Performance – Design Note 140
  Frank Cox
  Eight years ago, George Erdi wrote a very useful Design
  Note (DN6) that presented information to aid in the
  selection of op amps for optimum noise performance,
  in both graphical and tabular form. Design Note 140 is
  an update of DN6. It covers new low noise op amps as
  well as some high speed op amps. Although a great deal
  has changed in eight years, especially in electronics,
  noise is still a critical issue in op amp circuit design
  and the LTВ®1028 is still the lowest noise op amp for
  low source impedance applications.
  The amount of noise an op amp circuit will produce
  is determined by the device used, the total resistance
  in the circuit, the bandwidth of the measurement, the
  temperature of the circuit and the gain of the circuit. A
  convenient п¬Ѓgure of merit for the noise performance
  of an op amp is the spectral density or spot noise. This
  is obtained by normalizing the measurement to a unit
  of bandwidth. Here the unit is 1Hz and the noise is reported as “nV/√Hz.” The noise in a particular application
  bandwidth can be calculated by multiplying the spot
  noise by the square root of the application bandwidth. …

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  Noise Calculations in Op Amp Circuits &mdash DN15
  PDF, 224 Kb, File published: Sep 1, 1988
  Extract from the document

  Noise Calculations1 in Op Amp Circuits – Design Note 15
  Alan Rich
  Noise calculations in op amp circuits are one of the most
  confused calculations that an analog engineer must
  perform.
  One cannot just look at noise specifications; the total op
  amp circuit including resistors and operating frequency
  range must be included in calculations for circuit noise. A
  “low” noise amplifier in one circuit will become a “high”
  noise amplifier in another circuit.
  As part of this Design Note, an IBM-PC2 or compatible
  computer program, NOISE, has been written to perform
  the noise calculations. This program allows the user to
  calculate circuit noise using LTC op amps, determine the
  best LTC op amp for a low noise application, display the
  noise data for LTC op amps, calculate resistor noise, and
  calculate circuit noise using noise specs for any op amp.
  At the end of this Design Note there are detailed operating
  instructions for the computer program NOISE.
  To calculate noise for an op amp circuit, one must consider the op amp voltage and current noise density and
  1/f corner frequency, the frequency range of interest, and
  the resistor noise.
  The most comprehensive specification for voltage or current noise is the noise density frequency response curve …

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  Operational Amplifier Selection Guide for Optimum Noise Performance &mdash DN3
  PDF, 224 Kb, File published: Oct 1, 1987
  Extract from the document

  Operational Amplifier Selection Guide for Optimum Noise
  Performance – Design Note 3
  George Erdi
  The LTВ®1028 is the lowest noise op amp available today.
  Its voltage noise is less than that of a 50О© resistor. In
  other words, if the LT1028 is operated with source resistors in excess of 50О© , resistor noise will dominate. If the
  application requires large source resistors, the LT1028’s
  relatively high current noise will limit performance, and
  other op amps will provide lower overall noise. The table below lists which op amp gives minimum total
  noise for a specified equivalent source resistance. A two
  step procedure should be followed to optimize noise: In general, the total noise of any op amp (referred to the
  input) is given by: The table actually has two sets of devices: one for low
  frequency (instrumentation), one for wideband applications. The slight differences between the two columns
  occur because voltage and current noise increase at low
  frequencies (below the so-called 1/f corner) while resistor
  noise is flat with frequency. total noise = (voltage noise) + (resistor noise) + (current noise R )
  2 2 2 eq where, (2) Enter the table to find the optimum op amp. Best Op Amp for Lowest Noise vs Source Resistance resistor noise = 0.13 Re q in nV Hz
  and Req = equivalent source resistance
  = R2 + R1//R3
  R3
  R1 – R2 + DN003 F01 Several conclusions can be reached by inspection of the
  equation:
  (a) To minimize noise, resistor values should be minimized to make the contribution of the second and …

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  LT1056 Improved JFET Op Amp Macromodel Slews Asymmetrically &mdash DN43
  PDF, 89 Kb, File published: Jan 1, 1991
  Extract from the document

  LT1056 Improved JFET Op Amp Macromodel Slews
  Asymmetrically – Design Note 43
  Walt Jung
  GOSIT V+ 1 + 2 – 3 ISS
  CS (CE) + SPICE macromodels for op amps have been available
  for some time for both bipolar1,2 and JFET3 input stage
  device types. Interestingly however, not much attention
  has been given in the models available to controlled
  slewing asymmetry. Dependent upon a given amplifier
  design topology, the large signal characteristics can
  have various degrees of slew rate (SR) asymmetry. It
  therefore makes sense to have models which emulate
  real IC parts in this regard. 4 (+)
  (–) 4 – 3 + GA
  2 1 J1
  J2
  JM1 JM2 VOUT + RS0 C1 A case in point is that of the available P-channel JFET
  input op amps, many which have a characteristic SR
  response which is asymmetrical. In fact, popular op
  amps with topologies like the original 355/356 types
  are intrinsically faster for negative going output swings
  than they are for positive. Similar comments apply to
  such related devices as the OP15, OP16, etc. Since …

• Download
  Operational Amplifier Selection Guide for Optimum Noise Performance &mdash DN6
  PDF, 137 Kb, File published: Jan 1, 1988

Articles

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  Complete USB Solution Provides PowerPath Control and Input Current Limiting while Charging a Li-Ion Battery &mdash LT Journal
  PDF, 100 Kb, File published: Sep 1, 2003
  Extract from the document

  DESIGN IDEAS Complete USB Solution Provides
  PowerPath Control and Input
  Current Limiting while Charging
  by Trevor Barcelo
  a Li-Ion Battery
  Introduction An increasing number of portable
  handheld devices are using the Universal Serial Bus (USB) to exchange
  data with a host computer. Now, more
  portable device designs are taking
  advantage of the power-supply provisions of the USB specification—hosts
  can supply up to 500mA at a nominal
  5V—to power the portable device and
  charge its batteries. The most effective
  use of the USB-limited 500mA requires
  a USB-compliant battery charger and
  well-designed PowerPathв„ў controls. USB Power Specifications
  USB power specifications require that
  a Li-Ion battery charger is able to operate at input voltages as low as 4.75V
  (ignoring resistive drops in the cable
  and connectors which further reduce
  this value to 4.4V), has a low current
  standby mode, and that it limits the
  total current drawn from the USB …

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Manufacturer's Classification

• Signal Conditioning > Amplifiers > Operational Amplifiers (Op Amps) > High Voltage Amplifiers (>12V) | Low Bias Current Amplifiers (Ib < 100pA) | JFET Input Amplifiers

Other Names:

LT1056S8PBF, LT1056S8 PBF