Datasheet Linear Technology LT1058

ManufacturerLinear Technology
SeriesLT1058

Dual and Quad, JFET Input Precision High Speed Op Amps

Datasheets

Datasheet LT1057, LT1058
PDF, 340 Kb, Language: en, File uploaded: Jul 28, 2017, Pages: 16
Dual and Quad, JFET Input Precision High Speed Op Amps
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Prices

Packaging

LT1058ACN#PBFLT1058CN#PBFLT1058ISW#PBFLT1058ISW#TRPBFLT1058SW#PBFLT1058SW#TRPBF
N123456
PackageN-14
Package Outline Drawing
N-14
Package Outline Drawing
SW-16
Package Outline Drawing
SW-16
Package Outline Drawing
SW-16
Package Outline Drawing
SW-16
Package Outline Drawing
Package CodeNNSWSWSWSW
Package Index05-08-1510 (N14)05-08-1510 (N14)05-08-1620 (SW16)05-08-1620 (SW16)05-08-1620 (SW16)05-08-1620 (SW16)
Pin Count141416161616

Parametrics

Parameters / ModelsLT1058ACN#PBFLT1058CN#PBFLT1058ISW#PBFLT1058ISW#TRPBFLT1058SW#PBFLT1058SW#TRPBF
Av Min Stable, V/V111111
Avol, dB515151515151
Common Mode Rejection Ratio, dB989898989898
Number of Channels444444
Cload, pF800080008000800080008000
Design ToolsLTspice ModelLTspice ModelLTspice ModelLTspice ModelLTspice ModelLTspice Model
Enoise 1/f Corner, Hz282828282828
Enoise Density, nV/rtHz131313131313
Export Controlnononononono
GBW, MHz555555
Ibias, nA0.0050.0050.0050.0050.0050.005
Inoise, pA/rtHz0.00150.00150.00150.00150.00150.0015
Inoise 1/f Corner, Hz0.10.10.10.10.10.1
Ios, µA0.0000030.0000030.0000030.0000030.0000030.000003
Iout, mA202020202020
Isupply, mA1.61.61.61.61.61.6
LF Enoise, µVPP2.42.42.42.42.42.4
Operating Temperature Range, °C0 to 700 to 70-40 to 85-40 to 850 to 700 to 70
Over-the-Topnononononono
PSRR, dB103103103103103103
Rail-to-Rail Innononononono
Rail-to-Rail Outnononononono
SR, V/µs141414141414
Shutdownnononononono
Single Supplynononononono
Ts (0.1%), ns600600600600600600
TypeJFET, VFBJFET, VFBJFET, VFBJFET, VFBJFET, VFBJFET, VFB
VinCM High (from V+), V0.70.70.70.70.70.7
VinCM Low (from V-), V3.53.53.53.53.53.5
Voh (from V+), V222222
Vol (from V-), V222222
Vos, mV0.180.180.180.180.180.18
Vos TC, µV/C444444
Vs Max, V404040404040
Vs Min, V888888

Eco Plan

LT1058ACN#PBFLT1058CN#PBFLT1058ISW#PBFLT1058ISW#TRPBFLT1058SW#PBFLT1058SW#TRPBF
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

Other Options

LT1057 LT1057

Application Notes

  • Using the LTC Op Amp Macromodels &mdash AN48
    PDF, 297 Kb, File published: Nov 8, 1991
    LTC's op amp macromodels are described in detail, along with the theory behind each model and complete schematics of each topology. Extended modeling topics are discussed, such as phase/frequency response modifications and asymmetric slew rate for JFET op amp models. LTC's macromodels are optimized for accuracy and fast simulation times. Simulation times can be further reduced by using streamlining techniques found throughout AN48.
    Extract from the document

Design Notes

  • Updated Operational Amplifier Selection Guide for Optimum Noise Performance &mdash DN140
    PDF, 74 Kb, File published: Oct 1, 1996
    Extract from the document
  • Noise Calculations in Op Amp Circuits &mdash DN15
    PDF, 224 Kb, File published: Sep 1, 1988
    Extract from the document
  • Operational Amplifier Selection Guide for Optimum Noise Performance &mdash DN3
    PDF, 224 Kb, File published: Oct 1, 1987
    Extract from the document
  • Operational Amplifier Selection Guide for Optimum Noise Performance &mdash DN6
    PDF, 137 Kb, File published: Jan 1, 1988

Model Line

Manufacturer's Classification

  • Signal Conditioning > Amplifiers > Operational Amplifiers (Op Amps) > JFET Input Amplifiers | High Voltage Amplifiers (>12V) | Low Bias Current Amplifiers (Ib < 100pA)