Datasheet Linear Technology LTC2410

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Application Notes

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  A Standards Lab Grade 20-Bit DAC with 0.1ppm/В° Drift: The Dedicated Art of Digitizing One Part Per Million &mdash AN86
  PDF, 540 Kb, File published: Jan 1, 2001
  This publication details a true 1ppm D-to-A converter. Total DC error of this processor corrected DAC remains within 1ppm from 18-32°C, including reference drift. DAC error exclusive of reference drift is substantially better. Construction details and performance verification techniques are included, along with a complete software listing.
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  Application Note 86
  January 2001
  A Standards Lab Grade 20-Bit DAC with 0.1ppm/В°C Drift
  The Dedicated Art of Digitizing One Part Per Million
  Jim Williams
  J. Brubaker
  P. Copley
  J. Guerrero
  F. Oprescu INTRODUCTION
  Significant progress in high precision, instrumentation
  grade D-to-A conversion has recently occurred. Ten years
  ago 12-bit D-to-A converters (DACs) were considered
  premium devices. Today, 16-bit DACs are available and
  increasingly common in system design. These are true
  precision devices with less than 1LSB linearity error and
  1ppm/В°C drift.1 Nonetheless, there are DAC applications
  that require even higher performance. Automatic test
  equipment, instruments, calibration apparatus, laser trimmers, medical electronics and other applications often
  require DAC accuracy beyond 16 bits. 18-bit DACs have
  been produced in circuit assembly form, although they are
  expensive and require frequent calibration. 20 and even
  23+ (0.1ppm!) bit DACs are represented by manually
  switched Kelvin-Varley dividers. These devices, although …

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  Delta Sigma ADC Bridge Measurement Techniques &mdash AN96
  PDF, 232 Kb, File published: Jan 17, 2005
  AN96 features several applications that demonstrate how to take full advantage of Linear Technology's delta sigma ADCs when interfacing to sensors. In many cases, signal conditioning can be greatly simplified or eliminated completely. This note explains where it is appropriate to use amplifiers and how to optimize amplifier gain. Also included are discussions on measuring effective number of bits (ENOB) and the relationship to instrument performance, frequency response of delta sigma ADCs, and test techniques. C source code for all of the applications is included to aid firmware development.
  Extract from the document

  Application Note 96
  January 2005
  Delta Sigma ADC Bridge Measurement Techniques
  Mark Thoren
  Introduction In a typical 12-bit measurement system, the signal conditioning amplifier requires a very high gain in order to make
  use of the full ADC input range. A sensor with a 10mV fullscale output requires a gain of 500 to use the full input
  range of a typical 5V input ADC. A filter may be required to
  reduce noise at the expense of settling time. Additional
  difficulties arise when dealing with the large common
  mode voltage typical of a bridge sensor. Most instrumentation amplifiers have a large discrepancy between the
  typical CMRR and guaranteed minimum, which may require an additional trim. Sensors for pressure, load, temperature, acceleration and
  many other physical quantities often take the form of a
  Wheatstone bridge. These sensors can be extremely linear
  and stable over time and temperature. However, most
  things in nature are only linear if you don’t bend them too
  much. In the case of a load cell, Hooke’s law states that the
  strain in a material is proportional to the applied stress—
  as long as the stress is nowhere near the material’s yield
  point (the “point of no return” where the material is
  permanently deformed). The consequence is that a load
  cell based on a resistance strain gauge will have a very
  small electrical output—often only a few millivolts. In
  spite of this, instruments with 100,000 counts of resolution and more are possible. This Application Note presents …

Articles

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  Easy-to-Use Spread Spectrum Clock Generator Reduces EMI and More &mdash LT Journal
  PDF, 847 Kb, File published: Feb 1, 2004
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  DESIGN FEATURES Easy-to-Use Spread Spectrum Clock
  Generator Reduces EMI and More
  The widespread proliferation of new
  portable electronic devices has created a problem for manufacturers
  and consumers alike: the potential
  for electromagnetic interference (EMI)
  between devices. EMI at minimum is
  a nuisance, as in the case of noise
  added to a television picture or a radio receiver. At worst, it can impair
  the operation of electronic devices in
  critical applications. EMI sources can
  be elusive, and thus hard to eradicate
  once a device is in the late stages of
  development. It behooves a device
  designer to proactively minimize the
  number of potential sources of EMI,
  possibly saving significant troubleshooting time down the road.
  The amount of EMI generated, and
  whether it will produce significant
  interference, is not intuitively quantifiable. One way to quantify potential EMI
  problems is to test the conformance
  of the end product to various limits
  through procedures established by …

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  No Latency Delta-Sigma ADC Techniques for Optimized Performance &mdash LT Journal
  PDF, 239 Kb, File published: May 1, 2001
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  DESIGN FEATURES Introduction Product Family Overview Linear Technology’s Delta-Sigma analog-to-digital converter product family
  simplifies a variety of applications.
  The products’ ease-of-use and high
  accuracy without the need for calibration, external clocks or complex
  interfaces enables designers to rethink
  their system architectures.
  Although 24 bits may seem excessive to some, many designers find
  significant advantages with these
  higher resolution converters. One
  such advantage is the elimination of
  front-end amplification. This enables
  direct digitization of many sensors
  while removing problems associated
  with front-end offset and gain errors
  as well as simplifying tare adjustments. One misconception commonly
  solved by designers using the
  LTC2400 family is the relationship
  between speed and resolution. Many
  designers have found that higher
  speed ADCs with averaging do not
  meet the one-shot performance of the
  LTC2400 family. The absolute accuracy of the LTC2400 family is
  demonstrated using a bridge sensor …

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  Using Bipolar Preamplifiers in an LTC2411-Based Correlated Double Sampling Scheme Produces a Noise Floor of Under 100nVRMS &mdash LT Journal
  PDF, 160 Kb, File published: May 1, 2001
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  DESIGN IDEAS Using Bipolar Preamplifiers in an
  LTC2411-Based Correlated Double
  Sampling Scheme Produces a Noise
  by Derek Redmayne
  Floor of Under 100nVRMS
  Introduction
  AC excitation. Putting preamplification in front of 24-bit delta sigma
  converters such as the LTC2410 or
  LTC2411 now uncovers the limitations of precision op amps. The most
  serious of these limitations are offset
  voltage drift, 1/f noise and thermocouple voltages that, in the presence
  of turbulent airflow, produce noise.
  The use of correlated double sampling, a close cousin of AC excitation,
  circumvents most of the problems
  associated with the use of a low noise
  bipolar amplifier, but can often
  become complicated, or can easily be
  compromised to the extent that its
  use is not worthwhile. 1/f noise are virtually eliminated.
  Correlated double sampling has been
  used in high end weigh scale applications for many years.
  A low noise bipolar amplifier may
  seem like the obvious choice as a …

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  A New, Fully Differential, No Latency Delta-Sigma ADC Family &mdash LT Journal
  PDF, 141 Kb, File published: Nov 1, 2000
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  DESIGN INFORMATION A New, Fully Differential, No Latency
  Delta-Sigma ADC Family by Michael K. Mayes
  Introduction
  In recent years, Linear Technology
  has introduced a family of high resolution delta-sigma analog-to-digital
  converters. Originating from the
  LTC2400, this product family features high accuracy (10ppm total
  error), ease of use (8-pins, on-chip
  oscillator, no latency) and low drift
  (user-transparent offset/full-scale
  calibration). This product family
  includes single-ended one-, two-, fourand eight-channel input devices with
  user-selectable 50Hz or 60Hz linefrequency rejection.
  A new family of differential-input
  delta-sigma analog-to-digital converters is introduced here. These
  converters offer features similar to
  those of the previous family, with the
  addition of differential input and differential reference. All devices offer
  compatible timing and interface with
  the original LTC2400, as well as transparent calibration, no latency, on-chip
  oscillator and wide supply (2.7V–
  5.5V), input and reference ranges.
  The first part, the LTC2410, features 0.1ppm offset error, 2ppm INL, …

Model Line

Manufacturer's Classification

• Data Conversion > Analog-to-Digital Converters (ADC) > Precision ADCs (Fs < 10Msps) > Single Channel ADCs