Datasheet Linear Technology LTM9002CV-LA#PBF
| Manufacturer | Linear Technology |
| Series | LTM9002-LA |
| Part Number | LTM9002CV-LA#PBF |
14-Bit, 125Msps Dual-Channel IF/ Baseband Receiver Subsystem
Datasheets
Datasheet LTM9002
PDF, 355 Kb, Language: en, File uploaded: Aug 21, 2017, Pages: 28
14-Bit, 125Msps Dual-Channel IF/Baseband Receiver Subsystem
14-Bit, 125Msps Dual-Channel IF/Baseband Receiver Subsystem
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Packaging
| Package | 15mm × 11.25mm × 2.32mm LGA |
| Package Code | LGA |
| Package Index | 05-08-1757 |
Parametrics
| ADC INL | 1.5 LSB |
| ADCs | 2 |
| Architecture | Pipeline |
| Bits | 12 bits |
| Number of Channels | 2 |
| DNL | 0.6 LSB |
| Demo Boards | DC1298A-AA |
| Export Control | no |
| Features | Clock Duty Cycle Stabilizer |
| I/O | Parallel CMOS |
| Input Drive | Differential, Single-Ended |
| Input Span | 200mVpp (Ch.A), 800mVpp (Ch.B) |
| Internal Reference | yes |
| Latency | 5 |
| Operating Temperature Range | 0 to 70 °C |
| Power | 690 mW |
| SINAD | 71 dB |
| SNR | 69.9 dB |
| Simultaneous | no |
| Speed | 65000 ksps |
| Supply Voltage Range | 3V |
Eco Plan
| RoHS | Compliant |
Other Options
Model Line
Series: LTM9002-LA (2)
- LTM9002CV-LA#PBF LTM9002IV-LA#PBF
Manufacturer's Classification
- Data Conversion > Analog-to-Digital Converters (ADC) > High Speed ADCs (Fs >=10Msps)
- Data Conversion > Signal Chain µModule Receivers
Other Names:
LTM9002CV-LAPBF, LTM9002CV-LA PBF, LTM9002CVLA#PBF, LTM9002CV LA#PBF
