Datasheet Microchip PIC32MK0512GPD100

PIC32MK GENERAL
PURPOSE AND MOTOR
CONTROL (GP/MC) FAMILY
32-bit General Purpose and Motor Control Application MCUs with FPU and up to 1 MB
Live-Update Flash, 256 KB SRAM, 4 KB EEPROM, and Op amps
Operating Conditions: 2.2V to 3.6V Security Features -40ВєC to +105ВєC, DC to 120 MHz -40ВєC to +125ВєC, DC to 80 MHz Advanced Memory Protection:
-Peripheral and memory region access control
-Secure boot Core: 120 MHz (up to 198 DMIPS) MIPS32В® microAptivв„ў MCU core with Floating Point Unit microMIPSв„ў mode for up to 40% smaller code size DSP-enhanced core:
-Four 64-bit accumulators
-Single-cycle MAC, saturating and fractional math Code-efficient (C and Assembly) architecture Two 32-bit core register files to reduce interrupt latency Clock Management 8 MHz В±2% (FRC) internal oscillator -40ВєC to +85ВєC Programmable PLLs and oscillator clock sources:
-HS and EC clock modes Secondary USB PLL 32 kHz Internal Low-power RC oscillator (LPRC) Independent external low-power 32 kHz crystal oscillator Fail-Safe Clock Monitor (FSCM) Independent Watchdog Timers (WDT) and Deadman Timer (DMT) Fast wake-up and start-up Four Fractional clock out (REFCLKO) modules Power Management Low-power management modes (Deep Sleep, Sleep, and Idle) Integrated:
-Power-on Reset (POR) and Brown-out Reset (BOR) On-board capacitorless regulator Motor Control PWM Eight PWM pairs
Six additional Single-Ended PWM modules
Dead Time for rising and falling edges
Dead-Time Compensation
8.33 ns PWM Resolution
Clock Chopping for High-Frequency Operation
PWM Support for:
-DC/DC, AC/DC, inverters, PFC, lighting
-BLDC, PMSM, ACIM, SRM motors Choice of six Fault and Current Limit Inputs Flexible Trigger Configuration for ADC Triggering Motor Encoder Interface Six Quadrature Encoder Interface (QEI) modules:
-Four inputs: Phase A, Phase B, Home, and Index Audio/Graphics/Touch Interfaces External Graphics interfaces through PMP
Up to six I2S audio data communication interfaces
Up to six SPI audio control interfaces …