Datasheet Microchip TP2535

ManufacturerMicrochip
SeriesTP2535

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process

Datasheets

TP2535 Datasheet - P-Channel Enhancement-Mode Vertical DMOS FET
PDF, 612 Kb, Revision: 06-27-2014
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Prices

Status

TP2535N3-G
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)

Packaging

TP2535N3-G
N1
PackageTO-92
Pins3

Parametrics

Parameters / ModelsTP2535N3-G
BVdss min, V-350
CISSmax, pF125
Operating Temperature Range, °C-55 to +150
Rds, on) max25
Vgs(th) max, V-2.4

Eco Plan

TP2535N3-G
RoHSCompliant

Model Line

Series: TP2535 (1)