Datasheet Microchip VP2450

ManufacturerMicrochip
SeriesVP2450

This low threshold, enhancement-mode (normally-off) transistor utilizes a vertical DMOS structure and well-proven, silicon-gate manufacturing process

Datasheets

VP2450 P-Channel Enhancement-Mode Vertical DMOS FET Data Sheet
PDF, 1.1 Mb, Revision: 11-08-2016
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Prices

Status

VP2450N3-GVP2450N8-G
Lifecycle StatusProduction (Appropriate for new designs but newer alternatives may exist)Production (Appropriate for new designs but newer alternatives may exist)

Packaging

VP2450N3-GVP2450N8-G
N12
PackageTO-92SOT-89
Pins33

Parametrics

Parameters / ModelsVP2450N3-GVP2450N8-G
BVdss min, V-500-500
CISSmax, pF190190
Operating Temperature Range, °C-55 to +150-55 to +150
Rds, on) max3030
Vgs(th) max, V-3.5-3.5

Eco Plan

VP2450N3-GVP2450N8-G
RoHSCompliantCompliant

Model Line

Series: VP2450 (2)