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  Low Offset 2-Wire Bus Buffer Provides Capacitance Buffering, Stuck Bus Recovery, and Tolerates High VOL &mdash LT Journal
  PDF, 274 Kb, File published: Oct 16, 2007
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  L DESIGN FEATURES Low Offset 2-Wire Bus Buffer Provides
  Capacitance Buffering, Stuck Bus
  Recovery, and Tolerates High VOL by John Ziegler Introduction
  High availability computing, networking and data storage systems employ
  system management buses such as I2C
  or SMBus to monitor system health.
  These simple serial buses allow system controllers to monitor parameters
  such as temperature and voltage,
  read vital product information from
  individual cards, and make changes
  to the system, such as controlling fan
  speed. As these systems increase in
  complexity, several implementation
  issues arise with the system management bus.
  First, each additional device on the
  bus adds a capacitive load. The bus
  capacitance of a large system makes
  meeting rise time specifications very
  difficult. While a strong pull-up resistor
  can reduce the rise time, the penalty
  is increased VOL and decreased noise
  margin. Second, some devices that can
  communicate via I2C or SMBus have a …

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• Interface > I2C and SMBus Bus Buffers and Accelerators

Other Names:

LTC4309IGNPBF, LTC4309IGN PBF