Datasheet Microchip PL520-80

PL520-80
Low Phase Noise VCXO (9.5-65MHz)
DIE CONFIGURATION FEATURES XIN DIE SPECIFICATIONS
Name Value Size
Reverse side
Pad dimensions 62 x 65 m il
GND
80 m icron x 80 micron Thickness 10 m il OUTSEL0^ VDD VDD VDD VDD N/C Reserved OUTSEL1^ 24 23 22 21 20 19 18 17 Die ID:
A2020-20C
27 N/C 28 S2^ 29 OE
CTRL 30 VCON 31 C502A
5 6 Reserved X OUT_SEL1*
(Pad 18)
0
0
1 OUT_SEL0*
(Pad 25)
0
1
0 1 1 OE_SELECT
(Pad 9) OE_CTRL
(Pad 30)
0 …