PDF, 70 Kb, File published: Mar 27, 2017
This application report discusses the power consumption for common system application usage scenarios for the AM571x Sitaraв„ў processors. The metrics contained in this document serve to provide users with a better understanding of AM571x active power behaviors: making it easier to determine a suitable configuration to meet a given power budget.
PDF, 461 Kb, File published: Nov 4, 2016
PDF, 6.7 Mb, File published: Apr 4, 2017
The purpose of a power distribution network (PDN) is primarily to provide clean and reliable power to the active devices on the system. The printed circuit board (PCB) is a critical component of the system-level PDN delivery network. As such, optimal design of the PCB power distribution network is of utmost importance for high performance microprocessors. This application report provides implement
PDF, 182 Kb, Revision: C, File published: Feb 22, 2016
This application report provides a summary of the differences between AM572x Silicon Revision 1.1/2.0 and AM571x Silicon Revision 1.0 high-performance ARMВ® devices.
PDF, 87 Kb, File published: Nov 19, 2015
This document gives a brief description of download location and installation procedures of the device Chip Support Package (CSP) for Code Composer Studioв„ў (CCS).
PDF, 55 Kb, File published: Oct 6, 2016
When customers develop applications that use multiple programmable cores on the AM57x they require a clear understanding of roles and configurations of multiple software (SW) components such as IPC, CMEM, CMA, Linuxв„ў, and SYS/BIOS on slave cores, in order to arrive at correct configuration for their application. This application report describes memory utilization schemes by A15/DSP/IPU, how they
PDF, 69 Kb, File published: Aug 25, 2017
This application report is designed to help customers understand what is involved with PCB design for AM57xx BGAs.
PDF, 785 Kb, Revision: A, File published: Aug 3, 2017
PDF, 1.3 Mb, File published: Sep 1, 2016
This document is a collection of frequently asked questions (FAQs) on enhanced direct memory access (EDMA) on KeyStoneв„ў I (KS1) and KeyStone II (KS2) devices, along with useful collateral and software reference links.
PDF, 2.2 Mb, Revision: A, File published: May 1, 2004
Application Note 1281 Bumped Die (Flip Chip) Packages
PDF, 71 Kb, Revision: A, File published: Jul 13, 2017
This software migration guide assists in porting legacy software developed for the Programmable Real-Time Unit Subsystem and Industrial Communication Subsystem (PRU-CSS) on AM335x to AM57x platforms.
PDF, 78 Kb, File published: Aug 2, 2017
Processor-SDK RTOS provides out-of-the-box power management examples that empower customers to tailor Sitara processors’ (ARM and DSP) power-performance points per use case. You can configure all supported operating points and run CPU Idle and Dhrystone benchmarking workloads while employing a minimal kernel with real-time assurance. This application report provides an overview of the Processor-SD
PDF, 29 Kb, File published: Jun 5, 2017
This application report documents the feature differences between the PRU subsystems available on different TI processors.
PDF, 62 Kb, File published: Jan 13, 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms.
PDF, 1.6 Mb, Revision: B, File published: Aug 13, 2015
PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
