PDF, 76 Kb, File published: Oct 1, 1994
This voice-echo canceler implementation is based on a similar implementation using the TMS320C2x 16-bit fixed-point digital signal processor (DSP). This document shows the differences between the two applications and highlights specific TMS320C5x features that support a voice echo canceler. The appendix provides a schematic for a dual-telephone interface for the TMS320C51.
PDF, 208 Kb, File published: Jul 1, 1997
This application report describes an echo canceller system using the Texas Instruments (TI?) TMS320C50 digital signal processor (DSP). The system is based on based on low resolution time-delay estimation, using the knowledge that mainly one or two active regions (depending on the number of reflections in the communication channel) characterize the impulse response of a typical echo-path in telepho
PDF, 189 Kb, File published: Jul 1, 1997
Active structures, used for manufacture satellites, robots or others industrial processes, are subjected to external disturbances inducing oscillation of the structure. With the technical progress of the last few years, piezoelectric sensors and actuators are now used to control such structures. The aim of our research is to develop a control algorithm embedded on a DSP board in order to stabilize
PDF, 111 Kb, File published: Jul 1, 1997
This application report describes and characterizes secure communication systems over the Public Switched Telephone Network (PSTN). Global solutions are presented concerning the secure transmission of speech, data and facsimile group 3 signals. The areas covered by this work are source coding/decoding and ciphering/deciphering. The Texas Instruments (TI(TM)) TMS320C50 digital signal processor
PDF, 126 Kb, File published: Oct 1, 1994
The voice-coding standard for U.S. digital cellular communications uses vector sum excited linear prediction (VSELP). This document provides an overview of VSELP and explains an interoperable VSELP alternative algorithm using the TMS320C51 16-bit fixed-point digital signal processor (DSP). A source code provider is cited for this application along with an extensive reference listing.
PDF, 305 Kb, File published: Jul 1, 1997
This application report describes the development of a sensorless brushless DC motor phase advance actuator system based on the Texas Instruments (TI)(tm) TMS320C50 digital signal processor (DSP) and TMS320C50 evaluation module (EVM). Results show that applying a direct digital control methodology to the problem of controlled phase advance in a brushless DC machine substantially increases the effe
PDF, 120 Kb, File published: Oct 1, 1994
The IS-54 U.S. digital cellular standard specified by the Telecomm Industry Association (TIA) uses a p/4-DQPSK modulation standard as the new modulation for U.S. digital cellular communication systems. This document focuses on the theory and implementation of a p/4-DQPSK modem on the TMS320C5x 16-bit fixed-point digital signal processor (DSP). A description of the modem scheme, modem theory, the m
PDF, 241 Kb, File published: Jun 1, 1997
This application report shows how to implement a single channel active adaptive noise canceller with the low cost Texas Instruments (TI(TM)) TMS320C50 ('C50) digital signal processor (DSP) starter kit (DSK). Once the needed equipment is obtained, building a functional active noise canceller is easy with the help of this application report. The canceller uses a feedback control topology and is desi
PDF, 163 Kb, File published: Oct 1, 1994
Today?s communications equipment requires DSPs to perform complicated algorithms in a limited amount of time. One such algorithm is the equalizer in a digital receiver. The equalizer removes distortions caused by the communications link between the transmit and receive antennae. This document discusses implementing an equalizer for the IS-54 standard on the fixed point TMS320C5x DSP. Background fo
PDF, 40 Kb, File published: Jun 1, 1997
The TMS320 DSP C compilers produce several relocatable blocks of code and data when C code is compiled. These blocks are called sections and can be allocated into memory in a variety of ways to conform to a variety of system configurations. The .bss section is used by the compiler for global and static variables. It is one of the default COFF sections that is used to reserve a specified amount of
PDF, 320 Kb, File published: Jun 30, 1997
This application report presents the design of an efficient V.34 transmitter and receiver pair. The algorithms behind the advanced encoding and decoding schemes of the V.34 recommendation are described, and the assembly language functions that implement these algorithms are referenced. The entire assembly language source code of the project is provided with full documentation of the details of the
PDF, 67 Kb, File published: Oct 1, 1994
U.S digital cellular terminal designs commonly use programmable digital signal processors (DSPs). All digital cellular transmitters employ conventional and CRC codes to protect against channel-induced errors. Receivers use Viterbi decoders and CRC syndrome checks to verify that the decoded data contains no errors. This document presents examples of error-protection and correction functions for VSE
PDF, 144 Kb, File published: Jul 1, 1997
This paper describes the teaching of Digital Signal Processors (DSP) through classical lectures and a practical case study where students have to implant a real time simplified FSK modem on a TMS320C50.*DISCLAIMER: This document was part of the DSP Solution Challenge 1995 European Team Papers. It may have been written by someone whose native language is not English. TI assumes no
PDF, 81 Kb, File published: Oct 1, 1994
Notebook-size tablets, pocket organizers, and handheld computers are part of the growing market for pen-based computers that offer handprint character recognition (HCR). This document describes implementing HCR for real-time applications such as financial trading, healthcare, and transportation. This application uses a PCMCIA card containing static memory and the TMS320C5x 16-bit fixed-point digi
PDF, 160 Kb, File published: Jul 1, 1997
This application report presents a study concerning the search for the best quadriphase complex sequences to use in digital pulse compression (DPC) radar sub-systems.Presently, only an exhaustive search is able to insure the discovery of best codes. This type of research requires a system with high computational power to scan a very important number of sequences.The Texas Instruments (TITM
PDF, 65 Kb, File published: Jul 1, 1997
The design philosophy, and the design and implementation of a teaching kit based on the TMS320C50 digital signal processor (DSP) is explained. The DSP Teaching Kit (DTK) contains everything to start teaching DSP immediately. It is self contained and aimed at first year Electronic engineering students and professional engineers who are new to DSPs.This document was part of the first
PDF, 55 Kb, File published: Oct 1, 1994
This document provides guidelines to DSP application software developers on organizing and structuring software to facilitate its maintenance and ease its porting to any custom-defined digital signal processor (DSP) hardware platform. This application uses a PCMCIA-based TMS320C5x 16-bit fixed-point DSP card with an external connector for analog interfacing. Reference material for this application
PDF, 319 Kb, File published: Jul 1, 1997
This application report describes the implementation of the Texas Instruments (TI(TM)) TMS320C50 digital signal process (DSP) and particularly the TMS320C50 DSP starter kit (DSK) as an advanced controller. The TMS320C50 effectively handles heavy computation loads required by adaptive predictive control methods. The design includes a supervisor to improve robustness to modeling errors. To illu
PDF, 317 Kb, File published: Jul 1, 1997
This application report describes an audioprocessor designed to create an artificial sense of space that improves the listening quality of music in an automobile. This is achieved by constructing four different signals from two stereo channels. The signals are delayed in a time domain that will add echo normally missing in a car.It is not the purpose of this project to restore the original s
PDF, 135 Kb, File published: Oct 1, 1994
The TMS320C5x 16-bit fixed-point digital signal processor (DSP) is well suited for data communications applications, especially the soft decision encoding/decoding found in V.32 modems. This document discusses the V.32 standard, the Viterbi encoder, and the Viterbi decoder. A performance analysis of the V.32 modem application is provided. A code source for this application is cited within the docu
PDF, 219 Kb, File published: Oct 1, 1994
Digital signal processor (DSP) based equalizer systems are prevalent in many diverse applications, such as voice, data, and video communications. In particular, the TMS320C5x 16-bit fixed-point DSP is widely used in digital cellular communications. This document provides a tutorial of equalization concepts including intersymbol interference, equalization, and LMS equalization. A code source is cit
PDF, 978 Kb, File published: Jul 1, 1997
Flexible AC Transmission Systems (FACTS) are thyristor based means for highly dynamic load flow control in electrical power supply and distribution. These newappliances have an impact on network parameters like transmission angle, nodevoltage, line current and harmonics. Thus the control of FACTS equipmentprovides a highly dynamic view of these parameters. For this purpose wedeveloped th
PDF, 338 Kb, File published: Jul 1, 1997
Pi/4 D-QPSK (Pi/4 shift Differential-Quadrature Phase Shift Keying) is a four level modulation scheme first proposed by Baker in 1962 and is currently the focus of intensive research. The scheme is currently implemented in the American Digital Cellular, Japanese Handy Phone and the European TETRA systems.The aim of this undergraduate project was to implement a Pi/4 Shift D-QPSK baseband modula
PDF, 351 Kb, File published: Jul 1, 1997
FEPMR is standing for Front-End and Doppler Processing for Monopulse Doppler Radar. It is a PCB at the frontier between the RF and the Digital Circuits for the radar AXIR. There are four channels, corresponding to the four squinted beams of the antenna (Right, Left, Up and Down). Each beam channel is processed in phase (I) and quadrature (Q) real baseband signals.The eight video analog signals
PDF, 119 Kb, File published: Jul 1, 1997
In 1995 several teams of EFREI students submitted a project to the Texas Instruments DSP Challenge. This paper describes the adventure of one project which passed with success the European semi-finals to go and participate to the worldwide final in May, 1996 in ATLANTA.The winning project deals with the Digital Signal Processing (hardware and software) associated with a new class of a Digital
PDF, 53 Kb, File published: Oct 1, 1994
Automated speech recognition (ASR) technology has been a bedfellow of cellular phone technology for many years. The benefits of combining the two technologies are obvious; the less time and focus a driver gives to placing a call, the more attentive he is to operating a vehicle. This document explains ASR technology implemented on a TMS320C2x DSP and shows the accuracy of this design.
PDF, 94 Kb, File published: Oct 1, 1994
Mobitex, a packetized wireless 900MHz wide area network (WAN) allows mobile/portable subscribers to transfer data, including e-mail, through the growing national and international network infrastructures. This document describes Mobitex DSP modems, their characteristics, and modulator design. The GMSK demodulator design is also presented.
PDF, 87 Kb, File published: Oct 1, 1994
This document presents an implementation of a hidden Markov model (HMM) speech recognition system using the 16-bit fixed-point TMS320C2xx or TMS320C5x digital signal processors (DSPs). It discusses system resource requirements, vocal flexibility and future enhancements to this system. The application is verified using a TMS320C53 DSP platform.
PDF, 646 Kb, File published: Jun 1, 1996
An active noise control (ANC) system based on adaptive filter theory was developed in the 1980s; however, only with the recent introduction of powerful but inexpensive digital signal processor (DSP) hardware, such as the TMS320 family, has the technology become practical. The specialized DSPs were designed for real-time numerical processing of digitized signals. These devices have enabled the
PDF, 295 Kb, Revision: A, File published: Dec 28, 1998
This application report presents two hardware solutions for interfacing the TLV1544 10-bit low-power analog-to-digital converter (ADC) to the TMS320C50 16-bit fixed-point digital signal processor (DSP). The report describes the interface hardware and shows three C-callable software routines which support the data transfer. In addition, it provides useful hints on the design of a typical system pow
PDF, 122 Kb, File published: Jun 1, 1996
Using a DSP to perform multi-channel DTMF decoding can decrease PBX system cost while increasing system performance and flexibility. This document presents an improved technique for 32-channel DTMF decoding using the TMS320C5x 16-bit fixed-point DSP. The appendix contains the assembler source code for this application.
PDF, 169 Kb, File published: Jul 1, 1995
The TMS320C5x high-speed 16-bit fixed-point DSP allows considerable flexibility to meet a wide range of clock requirements. This document provides information on crystal and ceramic resonators, their frequency characteristic, a background on oscillators, and the type of oscillator circuit to use on the TMS320C5x. Also included are design considerations for external components and solutions for com
PDF, 1.6 Mb, File published: Mar 1, 1994
This book provides an overview of the TMS320C5x 16-bit fixed-point digital signal processor (DSP) family and its use in telecommunication applications. Each section provides application specific information about the following topics: digital cell systems, speech synthesis, error-correction coding, base-band modulation and demodulation, equalization and channel estimation, speech and character rec
PDF, 199 Kb, File published: Apr 1, 1993
The power supply current requirements for the 16-bit fixed-point TMS320C5x digital signal processor (DSP) depend not only on the device functionality, but also on the system parameters. This document describes the techniques for analyzing the system and device operating current levels. Once these factors are determined the power dissipation can be calculated followed in turn by the device thermal
PDF, 161 Kb, File published: Mar 1, 1995
This document describes the system architecture of the TMS320 digital signal processor (DSP) PCMCIA media card and its operation. Operational examples are provided for setting up the DSP, for loading and executing single and multiple algorithms, and for resetting the DSP. An in-depth discussion of the common and attribute memory, bus arbitration, DSP/host communication and FPGA is provided.
PDF, 268 Kb, File published: Jul 1, 1994
Due to its discrete nature DSPs represent variables and performs arithmetic functions with a finite word length. This produces three effects: the selection of filter transfer functions is quantized with filter poles and zeros existing only at specific locations in the z plane; the input is quantized; and noise is introduced from DSP multiplication and division operations. This document shows how
PDF, 168 Kb, File published: Nov 1, 1994
Four steps are required to set the TMS320 DSP interrupts: create a interrupt service routine initialize the vector table and set the memory map enable the interrupts in the CPU and enable the interrupt sources. This document shows how to set the interrupts in C C callable assembly or in-line C. Sample C code segments are provided. The appendix gives complete examples for setting interrupt vec
