Datasheet Microchip dsPIC33CH128MP505
| Manufacturer | Microchip |
| Series | dsPIC33CH128MP505 |
Dual Core, High Performance
Datasheets
Datasheet dsPIC33CH128MP508
PDF, 5.7 Mb, Language: en, File uploaded: Dec 29, 2020, Pages: 822
28/36/48/64/80-Pin Dual Core, 16-Bit Digital Signal Controllers with High-Resolution PWM and CAN Flexible Data (CAN FD)
28/36/48/64/80-Pin Dual Core, 16-Bit Digital Signal Controllers with High-Resolution PWM and CAN Flexible Data (CAN FD)
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Detailed Description
System developers designing high-end embedded control applications can benefit from a new Digital Signal Controller (DSC) with two dsPIC DSC cores in a single chip.The dsPIC33CH has one core that is designed to function as a master while the other is designed as a slave. The slave core is useful for executing dedicated, time-critical control code while the master core is busy running the user interface, system monitoring and communications functions, customized for the end application. The dsPIC33CH is designed to facilitate independent code development for each core by separate design teams and allows seamless integration when they are brought together in one chip. The dsPIC33CH family is optimized for high-performance digital power, motor control and other high-end embedded applications requiring sophisticated algorithms.
Status
| DSPIC33CH128MP505-E/M4 | DSPIC33CH128MP505-E/PT | DSPIC33CH128MP505-E/PTVAO | DSPIC33CH128MP505-H/M4 | DSPIC33CH128MP505-H/PT | DSPIC33CH128MP505-I/M4 | DSPIC33CH128MP505-I/PT | DSPIC33CH128MP505T-I/M4 | DSPIC33CH128MP505T-I/PT | DSPIC33CH128MP505T-I/PTVAO | |
|---|---|---|---|---|---|---|---|---|---|---|
| Lifecycle Status | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) | Production (Appropriate for new designs but newer alternatives may exist) |
Packaging
| DSPIC33CH128MP505-E/M4 | DSPIC33CH128MP505-E/PT | DSPIC33CH128MP505-E/PTVAO | DSPIC33CH128MP505-H/M4 | DSPIC33CH128MP505-H/PT | DSPIC33CH128MP505-I/M4 | DSPIC33CH128MP505-I/PT | DSPIC33CH128MP505T-I/M4 | DSPIC33CH128MP505T-I/PT | DSPIC33CH128MP505T-I/PTVAO | |
|---|---|---|---|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 10 |
| Package | UQFN | TQFP | TQFP | UQFN | TQFP | UQFN | TQFP | UQFN | TQFP | TQFP |
Parametrics
| Parameters / Models | DSPIC33CH128MP505-E/M4 | DSPIC33CH128MP505-E/PT | DSPIC33CH128MP505-E/PTVAO | DSPIC33CH128MP505-H/M4 | DSPIC33CH128MP505-H/PT | DSPIC33CH128MP505-I/M4 | DSPIC33CH128MP505-I/PT | DSPIC33CH128MP505T-I/M4 | DSPIC33CH128MP505T-I/PT | DSPIC33CH128MP505T-I/PTVAO |
|---|---|---|---|---|---|---|---|---|---|---|
| ADC Input | 19 | 19 | 19 | 19 | 19 | 19 | 19 | 19 | 19 | 19 |
| Architecture | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| CPU Speed, MIPS/DMIPS | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 | 100 |
| CPU Type | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC | 16-bit dsPIC DSC |
| CTMU test | No | No | No | No | No | No | No | No | No | No |
| Configurable Logic Cell, CLC/CCL | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Crypto Engine | No | No | No | No | No | No | No | No | No | No |
| DAC Outputs | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Direct Memory Access Channels | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 | 8 |
| Graphics Controller/GPU | No | No | No | No | No | No | No | No | No | No |
| Hardware Cap Voltage Divider | False | False | False | False | False | False | False | False | False | False |
| Hardware RTCC/RTC | No | No | No | No | No | No | No | No | No | No |
| I2C | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| I2S | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| IrDA | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| LIN | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Lead Count | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 |
| Low Power | No | No | No | No | No | No | No | No | No | No |
| Max 16-Bit Digital Timers | 13 | 13 | 13 | 13 | 13 | 13 | 13 | 13 | 13 | 13 |
| Max 32-Bit Digital Timers | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| Max ADC Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| Max ADC Sampling Rate, ksps | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 | 3500 |
| Max DAC Resolution, Bits | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 | 12 |
| Max I/O Pins | 39 | 39 | 39 | 39 | 39 | 39 | 39 | 39 | 39 | 39 |
| Max PWM outputs, including complementary | 24 | 24 | 24 | 24 | 24 | 24 | 24 | 24 | 24 | 24 |
| Number of ADCs | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of CAN Modules | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| Number of Comparators | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of DACs | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
| Number of PWM Time Bases | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 | 5 |
| Operation Voltage Max, V | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 | 3.6 |
| Operation Voltage Min, V | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| PWM Max Resolution, Bits | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
| PWM Resolution, ns | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 | 0.25 |
| Parallel Port | No | No | No | No | No | No | No | No | No | No |
| Peripheral Pin Select / Pin Muxing | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| Peripheral Trigger Generator | True | True | True | True | True | True | True | True | True | True |
| Pincount | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 | 48 |
| Program Memory Size, KB | 128 | 128 | 128 | 128 | 128 | 128 | 128 | 128 | 128 | 128 |
| Quadrature Encoder Interface | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 |
| RAM, KB | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 | 20 |
| SENT | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
| SPI | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| Temp Range Max | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 | 150 |
| Temp Range Min | -40 | -40 | -40 | -40 | -40 | -40 | -40 | -40 | -40 | -40 |
| UART | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 | 3 |
| Vbat/Vddbu battery backup | No | No | No | No | No | No | No | No | No | No |
Other Options
dsPIC33CH128MP502 dsPIC33CH128MP503 dsPIC33CH128MP506 dsPIC33CH128MP508 dsPIC33CH64MP502 dsPIC33CH64MP503 dsPIC33CH64MP505 dsPIC33CH64MP506 dsPIC33CH64MP508
Model Line
Series: dsPIC33CH128MP505 (10)
Manufacturer's Classification
- MCUs/MPUs with Connectivity > CAN
