March 1996 NDS8947
Dual P-Channel Enhancement Mode Field Effect Transistor General Description Features These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed. -4A, -30V. RDS(ON) = 0.065Ω @ VGS = -10V
RDS(ON) = 0.1Ω @ VGS = -4.5V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
Dual MOSFET in surface mount package. ________________________________________________________________________________ Absolute Maximum Ratings
Symbol Parameter VDSS Drain-Source Voltage VGSS Gate-Source Voltage ID Drain Current -Continuous (Note 1a) 6 3 7 2 8 1 NDS8947 Units -30 V -20 V -4 A -15 Power Dissipation for Dual Operation
Power Dissipation for Single Operation TJ,TSTG 4 T A = 25°C unless otherwise noted -Pulsed
PD 5 2
(Note 1a)
(Note 1b) 1 (Note 1c) 0.9 Operating and Storage Temperature Range W 1.6 -55 to 150 °C THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W RθJC Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W © 1997 Fairchild Semiconductor Corporation NDS8947.SAM Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter Conditions Min
-30 Typ Max Units OFF CHARACTERISTICS …
