Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | Dual, Low Noise, 1 GHz FastFET Op Amplifier |
| Pages / Page | 25 / 5 — Data Sheet. ADA4817-1/ADA4817-2. ABSOLUTE MAXIMUM RATINGS Table 3. … |
| Revision | G |
| File Format / Size | PDF / 632 Kb |
| Document Language | English |
Data Sheet. ADA4817-1/ADA4817-2. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter Rating. THERMAL RESISTANCE. 3.5. Table 4. 3.0
Text Version of Document
link to page 5 link to page 5
Data Sheet ADA4817-1/ADA4817-2 ABSOLUTE MAXIMUM RATINGS Table 3.
2 P V I V V V S OUT OUT – (2) D S S
Parameter Rating
2 R R L L Supply Voltage 10.6 V Consider rms output voltages. If RL is referenced to −VS, as in Power Dissipation See Figure 4 single-supply operation, the total drive power is VS × IOUT. If the Common-Mode Input Voltage Range −VS − 0.5 V to +VS + 0.5 V rms signal levels are indeterminate, consider the worst-case Differential Input Voltage ±VS scenario, when VOUT = VS/4 for RL to midsupply. Storage Temperature Range −65°C to +125°C 2 Operating Temperature Range −40°C to +105°C /4 P V I V S (3) Lead Temperature (Soldering, 10 sec) 300°C D S S RL Junction Temperature 150°C In single-supply operation with RL referenced to −VS, the worst- Stresses at or above those listed under Absolute Maximum case situation is VOUT = VS/2. Ratings may cause permanent damage to the product. This is a Airflow increases heat dissipation, effectively reducing θJA. More stress rating only; functional operation of the product at these metal directly in contact with the package leads and exposed or any other conditions above those indicated in the operational paddle from metal traces, throughholes, ground, and power section of this specification is not implied. Operation beyond planes also reduces θJA. the maximum operating conditions for extended periods may affect product reliability. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the exposed paddle
THERMAL RESISTANCE
8-lead LFCSP (single 94°C/W), 8-lead SOIC (single 79°C/W) θJA is specified for the worst-case conditions, that is, θJA is specified and 16-lead LFCSP (dual 64°C/W) packages on JEDEC for a device soldered in the circuit board for the surface-mount standard 4-layer boards. θJA values are approximations. packages.
3.5 Table 4. ) 3.0 W Package Type θ ADA4817-2, LFCSP JA θJC Unit N ( IO 2.5
8-Lead LFCSP (ADA4817-1) 94 29 °C/W
AT ADA4817-1, SOIC IP
8-Lead SOIC (ADA4817-1) 79 29 °C/W
SS 2.0
16-Lead LFCSP (ADA4817-2) 64 14 °C/W
R DIEW 1.5 O ADA4817-1, LFCSP MAXIMUM SAFE POWER DISSIPATION P UM 1.0
The maximum safe power dissipation for the ADA4817-1/
IM AX
ADA4817-2 is limited by the associated rise in junction
M 0.5
temperature (TJ) on the die. At approximately 150°C (which is the glass transition temperature), the properties of the plastic
0
8
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
00 6- change. Even temporarily exceeding this temperature limit may
AMBIENT TEMPERATURE (°C)
75 07 change the stresses that the package exerts on the die, permanently Figure 4. Maximum Safe Power Dissipation vs. Ambient Temperature for shifting the parametric performance of the ADA4817-1/ a 4-Layer Board ADA4817-2. Exceeding a junction temperature of 175C for an
ESD CAUTION
extended period can result in changes in silicon devices, potentially causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the die due to the ADA4817-1/ADA4817-2 drive at the output. The quiescent power is the voltage between the supply pins (VS) multiplied by the quiescent current (IS). PD = Quiescent Power + (Total Drive Power – Load Power) (1) Rev. C | Page 5 of 25 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PADDLE LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADA4817-1/ADA4817-2 ABSOLUTE MAXIMUM RATINGS Table 3.
2 P V I V V V S OUT OUT – (2) D S S
Parameter Rating
2 R R L L Supply Voltage 10.6 V Consider rms output voltages. If RL is referenced to −VS, as in Power Dissipation See Figure 4 single-supply operation, the total drive power is VS × IOUT. If the Common-Mode Input Voltage Range −VS − 0.5 V to +VS + 0.5 V rms signal levels are indeterminate, consider the worst-case Differential Input Voltage ±VS scenario, when VOUT = VS/4 for RL to midsupply. Storage Temperature Range −65°C to +125°C 2 Operating Temperature Range −40°C to +105°C /4 P V I V S (3) Lead Temperature (Soldering, 10 sec) 300°C D S S RL Junction Temperature 150°C In single-supply operation with RL referenced to −VS, the worst- Stresses at or above those listed under Absolute Maximum case situation is VOUT = VS/2. Ratings may cause permanent damage to the product. This is a Airflow increases heat dissipation, effectively reducing θJA. More stress rating only; functional operation of the product at these metal directly in contact with the package leads and exposed or any other conditions above those indicated in the operational paddle from metal traces, throughholes, ground, and power section of this specification is not implied. Operation beyond planes also reduces θJA. the maximum operating conditions for extended periods may affect product reliability. Figure 4 shows the maximum safe power dissipation in the package vs. the ambient temperature for the exposed paddle
THERMAL RESISTANCE
8-lead LFCSP (single 94°C/W), 8-lead SOIC (single 79°C/W) θJA is specified for the worst-case conditions, that is, θJA is specified and 16-lead LFCSP (dual 64°C/W) packages on JEDEC for a device soldered in the circuit board for the surface-mount standard 4-layer boards. θJA values are approximations. packages.
3.5 Table 4. ) 3.0 W Package Type θ ADA4817-2, LFCSP JA θJC Unit N ( IO 2.5
8-Lead LFCSP (ADA4817-1) 94 29 °C/W
AT ADA4817-1, SOIC IP
8-Lead SOIC (ADA4817-1) 79 29 °C/W
SS 2.0
16-Lead LFCSP (ADA4817-2) 64 14 °C/W
R DIEW 1.5 O ADA4817-1, LFCSP MAXIMUM SAFE POWER DISSIPATION P UM 1.0
The maximum safe power dissipation for the ADA4817-1/
IM AX
ADA4817-2 is limited by the associated rise in junction
M 0.5
temperature (TJ) on the die. At approximately 150°C (which is the glass transition temperature), the properties of the plastic
0
8
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
00 6- change. Even temporarily exceeding this temperature limit may
AMBIENT TEMPERATURE (°C)
75 07 change the stresses that the package exerts on the die, permanently Figure 4. Maximum Safe Power Dissipation vs. Ambient Temperature for shifting the parametric performance of the ADA4817-1/ a 4-Layer Board ADA4817-2. Exceeding a junction temperature of 175C for an
ESD CAUTION
extended period can result in changes in silicon devices, potentially causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the die due to the ADA4817-1/ADA4817-2 drive at the output. The quiescent power is the voltage between the supply pins (VS) multiplied by the quiescent current (IS). PD = Quiescent Power + (Total Drive Power – Load Power) (1) Rev. C | Page 5 of 25 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PADDLE LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE
