Datasheet LTC1099 (Analog Devices) - 9

ManufacturerAnalog Devices
DescriptionHigh Speed 8-Bit A/D Converter with Built-In Sample-and-Hold
Pages / Page16 / 9 — DIGITAL I TERFACE. WR-RD Mode (Pin 7 = High). Adjusting the Conversion …
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DIGITAL I TERFACE. WR-RD Mode (Pin 7 = High). Adjusting the Conversion Time. RD Mode (Pin 7 = Low)

DIGITAL I TERFACE WR-RD Mode (Pin 7 = High) Adjusting the Conversion Time RD Mode (Pin 7 = Low)

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LTC1099
U DIGITAL I TERFACE
The digital interface to the LTC1099 entails either control- When RD goes low, with CS low, the result of the previous ling the conversion timing or reading data. There are two conversion is output. This data stays there until the basic modes for controlling and reading the A/D — the ongoing conversion is complete (INT goes low). At this Write-Read(WR-RD) mode and the Read (RD) mode. time the outputs are updated with new data. As long as CS and RD stay low long enough, the receiving
WR-RD Mode (Pin 7 = High)
device will get the right data. Remember, the receiving In the WR-RD mode, a conversion sequence starts on the device reads data in on the rising edge of RD. The RDY falling edge of WR with CS low (Figures 3a and 3b). This output facilitates making RD long enough. is an edge-sensitive control function. The width of the WR In the RD mode, the WR input becomes the RDY output. input is not important. All timing functions are internal to On the falling edge of RD, the RDY goes low. It is an open the A/D. drain output to allow a wired OR function so it requires a The first thing to happen after the falling edge of WR is the pull-up resistor. At the end of conversion, the active pull- internal S/H is switched to hold. This typically takes 110ns down is released and RDY goes high. after WR falls and is the aperture time of the S/H. The RDY output is designed to interface to the Ready In Next, the A/D conversion takes place. The conversion time (RDYIN) function on many popular processors. RDYIN is internally set at 2.5µs, but is user adjustable (see allows these processors to work with slow memory by Adjusting the Conversion Time). The end of conversion is stretching the RD strobe coming from the processor. RD signaled by the high to low transition of INT. The S/H is will remain low as long as RDY is low. In the case of the switched back to the acquire state as soon as the conver- LTC1099, RDY stays low until the conversion is complete sion is complete. and new data is available on the outputs. This greatly simplifies the programmers task. Each time data is re- After the conversion is complete, the 8-bit result is avail- quired from the A/D a simple read is executed. The able on the three-state outputs. The outputs are active with hardware interface makes sure the RD strobe is long RD and CS low. Output data is latched and, if no new enough. conversion is initiated, is available indefinitely as long as the power is not turned off.
Adjusting the Conversion Time
The WR-RD mode is also used for stand-alone operation. The conversion time of the LTC1099 is internally set at By tying CS and RD low the data outputs will be continu- 2.5µs. If desired, it can be adjusted by forcing a voltage on ously active (Figure 4). The falling edge of WR starts the Pin 19. With Pin 19 left open, the conversion time runs conversion sequence and when done new data will appear 2.5µs. A convenient way to force the voltage is with the on the outputs. All outputs will be updated simultaneously. circuit shown in Figure 7. To preset the conversion time to In stand-alone operation, the outputs will never be in a a fixed amount, a resistor may be tied from Pin 19 to VCC high impedance state. or GND. Tying it to VCC slows down the conversion and tying it to GND will speed it up (see Typical Performance
RD Mode (Pin 7 = Low)
Characteristics). In the RD mode, a conversion sequence is initiated by the 5V falling edge of RD when CS is low (Figure 2). The S/H is 1 20 switched to the hold state 110ns after the falling edge of 2 19 10k RD. It is switched back to the acquire state at the end of conversion. 1099 F07
Figure 7. Adjusting the Conversion Time
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