Datasheet LTC1273, LTC1275, LTC1276 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 12-Bit, 300ksps Sampling A/D Converters with Reference |
| Pages / Page | 24 / 8 — TYPICAL PERFOR A CE CH. ARA TERISTICS. Acquisition Time. S/(N + D) vs … |
| File Format / Size | PDF / 329 Kb |
| Document Language | English |
TYPICAL PERFOR A CE CH. ARA TERISTICS. Acquisition Time. S/(N + D) vs Input Frequency and. Intermodulation Distortion Plot
Model Line for this Datasheet
- LTC1273ACN#PBF LTC1273ACN#PBF LTC1273ACSW#PBF LTC1273ACSW#PBF LTC1273ACSW#TRPBF LTC1273ACSW#TRPBF LTC1273BCN#PBF LTC1273BCN#PBF LTC1273BCSW#PBF LTC1273BCSW#PBF LTC1273BCSW#TRPBF LTC1273BCSW#TRPBF
Text Version of Document
LTC1273 LTC1275/LTC1276
W U TYPICAL PERFOR A CE CH C ARA TERISTICS Acquisition Time S/(N + D) vs Input Frequency and Intermodulation Distortion Plot vs Source Impedance Amplitude
0 4500 80 fSAMPLE = 300kHz fSAMPLE = 300kHz 4000 70 –20 fIN1 = 29.37kHz VIN = 0dB fIN2 = 32.446kHz 3500 60 V –40 3000 IN = –20dB 50 2500 –60 40 2000 30 AMPLITUDE (dB) –80 1500 ACQUISITION TIME (ns) 20 1000 VIN = –60dB –100 500 SIGNAL/(NOISE + DISTORTION) (dB) 10 –120 0 0 0 20 40 60 80 100 120 140 160 10 100 1k 10k 1k 10k 100k 1M 10M FREQUENCY (kHz) R INPUT FREQUENCY (Hz) SOURCE (Ω) LTC1273/75/76 • F05 LTC1273/75/76 • TPC10 LTC1273/75/76 • TPC11
Spurious Free Dynamic Range Reference Voltage vs Input Frequency vs Load Current
0 2.435 fSAMPLE = 300kHz –10 2.430 –20 –30 2.425 –40 –50 2.420 –60 2.415 –70 REFERENCE VOLTAGE (V) –80 2.410 SPURIOUS FREE DYNAMIC RANGE (dB) –90 –100 2.405 10k 100k 1M 10M – 5 – 4 –3 –2 –1 0 1 2 LOAD CURRENT (mA) INPUT FREQUENCY (Hz) LTC1273/75/76 • TPC13 LTC1273/75/76 • TPC12
U U U PI FU CTIO S AIN (Pin 1):
Analog Input. 0V to 5V (LTC1273), ±2.5V
HBEN (Pin 19):
High Byte Enable Input. This pin is used (LTC1275) or ±5V (LTC1276). to multiplex the internal 12-bit conversion result into
V
the lower bit outputs (D7-D0/8). See Table 1. HBEN also
REF (Pin 2):
+ 2.42V Reference Output. Bypass to AGND (10µF tantalum in parallel with 0.1µF ceramic). disables conversion start when HIGH.
AGND (Pin 3):
Analog Ground.
RD (Pin 20):
READ Input. This active low signal starts a conversion when CS and HBEN are low. RD also
D11-D4 (Pins 4 to 11):
Three-State Data Outputs. enables the output drivers when CS is low.
DGND (Pin 12):
Digital Ground.
CS (Pin 21):
The CHIP SELECT Input must be low for
D3/11-D0/8 (Pins 13 to 16):
Three-State Data Outputs. the ADC to recognize RD and HBEN inputs.
NC (Pins 17 and 18):
No Connection.
BUSY (Pin 22):
The BUSY Output shows the converter status. It is low when a conversion is in progress. 127356fa 8
W U TYPICAL PERFOR A CE CH C ARA TERISTICS Acquisition Time S/(N + D) vs Input Frequency and Intermodulation Distortion Plot vs Source Impedance Amplitude
0 4500 80 fSAMPLE = 300kHz fSAMPLE = 300kHz 4000 70 –20 fIN1 = 29.37kHz VIN = 0dB fIN2 = 32.446kHz 3500 60 V –40 3000 IN = –20dB 50 2500 –60 40 2000 30 AMPLITUDE (dB) –80 1500 ACQUISITION TIME (ns) 20 1000 VIN = –60dB –100 500 SIGNAL/(NOISE + DISTORTION) (dB) 10 –120 0 0 0 20 40 60 80 100 120 140 160 10 100 1k 10k 1k 10k 100k 1M 10M FREQUENCY (kHz) R INPUT FREQUENCY (Hz) SOURCE (Ω) LTC1273/75/76 • F05 LTC1273/75/76 • TPC10 LTC1273/75/76 • TPC11
Spurious Free Dynamic Range Reference Voltage vs Input Frequency vs Load Current
0 2.435 fSAMPLE = 300kHz –10 2.430 –20 –30 2.425 –40 –50 2.420 –60 2.415 –70 REFERENCE VOLTAGE (V) –80 2.410 SPURIOUS FREE DYNAMIC RANGE (dB) –90 –100 2.405 10k 100k 1M 10M – 5 – 4 –3 –2 –1 0 1 2 LOAD CURRENT (mA) INPUT FREQUENCY (Hz) LTC1273/75/76 • TPC13 LTC1273/75/76 • TPC12
U U U PI FU CTIO S AIN (Pin 1):
Analog Input. 0V to 5V (LTC1273), ±2.5V
HBEN (Pin 19):
High Byte Enable Input. This pin is used (LTC1275) or ±5V (LTC1276). to multiplex the internal 12-bit conversion result into
V
the lower bit outputs (D7-D0/8). See Table 1. HBEN also
REF (Pin 2):
+ 2.42V Reference Output. Bypass to AGND (10µF tantalum in parallel with 0.1µF ceramic). disables conversion start when HIGH.
AGND (Pin 3):
Analog Ground.
RD (Pin 20):
READ Input. This active low signal starts a conversion when CS and HBEN are low. RD also
D11-D4 (Pins 4 to 11):
Three-State Data Outputs. enables the output drivers when CS is low.
DGND (Pin 12):
Digital Ground.
CS (Pin 21):
The CHIP SELECT Input must be low for
D3/11-D0/8 (Pins 13 to 16):
Three-State Data Outputs. the ADC to recognize RD and HBEN inputs.
NC (Pins 17 and 18):
No Connection.
BUSY (Pin 22):
The BUSY Output shows the converter status. It is low when a conversion is in progress. 127356fa 8
