Datasheet LTC1412 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 12-Bit, 3Msps, Sampling A/D Converter |
| Pages / Page | 16 / 1 — FEATURES. DESCRIPTION. Sample Rate: 3Msps. 72dB S/(N + D) and 82dB SFDR … |
| File Format / Size | PDF / 347 Kb |
| Document Language | English |
FEATURES. DESCRIPTION. Sample Rate: 3Msps. 72dB S/(N + D) and 82dB SFDR at Nyquist. 0.35LSB INL and. 0.25LSB DNL (Typ)
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Text Version of Document
LTC1412 12-Bit, 3Msps, Sampling A/D Converter
U FEATURES DESCRIPTION
■
Sample Rate: 3Msps
The LTC ®1412 is a 12-bit, 3Msps, sampling A/D con- ■
72dB S/(N + D) and 82dB SFDR at Nyquist
verter. This high performance device includes a high ■ ±
0.35LSB INL and
±
0.25LSB DNL (Typ)
dynamic range sample-and-hold and a precision refer- ■
Power Dissipation: 150mW
ence. Operating from ±5V supplies it draws only 150mW. ■ External or Internal Reference Operation The ±2.5V input range is optimized for low noise and low ■ True Differential Inputs Reject Common Mode Noise distortion. Most high performance op amps also perform ■ 40MHz Full Power Bandwidth Sampling best over this range, allowing direct coupling to the analog ■ ±2.5V Bipolar Input Range inputs and eliminating the need for special translation ■ No Pipeline Delay circuitry. Outstanding AC performance includes 72dB ■ 28-Pin SSOP Package S/(N + D) and 82dB SFDR at the Nyquist input frequency of 1.5MHz.
U APPLICATIONS
The unique differential input sample-and-hold can acquire ■ single-ended or differential input signals up to its 40MHz Telecommunications ■ bandwidth. The 60dB common mode rejection allows Digital Signal Processing ■ users to eliminate ground loops and common mode noise Mulitplexed Data Acquisition Systems ■ by measuring signals differentially from the source. High Speed Data Acquisition ■ Spectrum Analysis The ADC has a high speed 12-bit parallel output port. There ■ Imaging Systems is no pipeline delay in the conversion results. A separate , LTC and LT are registered trademarks of Linear Technology Corporation. convert start input and converter status signal (BUSY) ease connections to FIFOs, DSPs and microprocessors. A digital output driver power supply pin allows direct con- nection to 3V logic.
U TYPICAL APPLICATION
5V OPTIONAL 3V LOGIC
Effective Bits and Signal-to-Noise + Distortion
10µF SUPPLY
vs Input Frequency
AVDD DVDD OVDD 12 74 LTC1412 68 10 62 A + IN 12 D11 (MSB) • 56 OUTPUT S/H 12-BIT ADC • BUFFERS 8 S/(N + D) (dB) – • A D0 (LSB) IN 4.0625V 6 COMP BUFFER 10µF 4 BUSY 2k 2.5V TIMING AND EFFECTIVE NUMBER OF BITS V CS REF 2 REFERENCE LOGIC CONVST 0 V AGND DGND OGND SS 1k 10k 100k 1M 10M 1412 TA01 10µF INPUT FREQUENCY (Hz) – 5V 1412 G01 1
U FEATURES DESCRIPTION
■
Sample Rate: 3Msps
The LTC ®1412 is a 12-bit, 3Msps, sampling A/D con- ■
72dB S/(N + D) and 82dB SFDR at Nyquist
verter. This high performance device includes a high ■ ±
0.35LSB INL and
±
0.25LSB DNL (Typ)
dynamic range sample-and-hold and a precision refer- ■
Power Dissipation: 150mW
ence. Operating from ±5V supplies it draws only 150mW. ■ External or Internal Reference Operation The ±2.5V input range is optimized for low noise and low ■ True Differential Inputs Reject Common Mode Noise distortion. Most high performance op amps also perform ■ 40MHz Full Power Bandwidth Sampling best over this range, allowing direct coupling to the analog ■ ±2.5V Bipolar Input Range inputs and eliminating the need for special translation ■ No Pipeline Delay circuitry. Outstanding AC performance includes 72dB ■ 28-Pin SSOP Package S/(N + D) and 82dB SFDR at the Nyquist input frequency of 1.5MHz.
U APPLICATIONS
The unique differential input sample-and-hold can acquire ■ single-ended or differential input signals up to its 40MHz Telecommunications ■ bandwidth. The 60dB common mode rejection allows Digital Signal Processing ■ users to eliminate ground loops and common mode noise Mulitplexed Data Acquisition Systems ■ by measuring signals differentially from the source. High Speed Data Acquisition ■ Spectrum Analysis The ADC has a high speed 12-bit parallel output port. There ■ Imaging Systems is no pipeline delay in the conversion results. A separate , LTC and LT are registered trademarks of Linear Technology Corporation. convert start input and converter status signal (BUSY) ease connections to FIFOs, DSPs and microprocessors. A digital output driver power supply pin allows direct con- nection to 3V logic.
U TYPICAL APPLICATION
5V OPTIONAL 3V LOGIC
Effective Bits and Signal-to-Noise + Distortion
10µF SUPPLY
vs Input Frequency
AVDD DVDD OVDD 12 74 LTC1412 68 10 62 A + IN 12 D11 (MSB) • 56 OUTPUT S/H 12-BIT ADC • BUFFERS 8 S/(N + D) (dB) – • A D0 (LSB) IN 4.0625V 6 COMP BUFFER 10µF 4 BUSY 2k 2.5V TIMING AND EFFECTIVE NUMBER OF BITS V CS REF 2 REFERENCE LOGIC CONVST 0 V AGND DGND OGND SS 1k 10k 100k 1M 10M 1412 TA01 10µF INPUT FREQUENCY (Hz) – 5V 1412 G01 1
