Datasheet LTC1412 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 12-Bit, 3Msps, Sampling A/D Converter |
| Pages / Page | 16 / 8 — APPLICATIONS INFORMATION. Figure 2a. LTC1412 Nonaveraged, 4096 Point FFT, … |
| File Format / Size | PDF / 347 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. Figure 2a. LTC1412 Nonaveraged, 4096 Point FFT, Input Frequency = 100kHz
Model Line for this Datasheet
Text Version of Document
LTC1412
U U W U APPLICATIONS INFORMATION
0 C + SAMPLE fSMPL = 3Msps SAMPLE fIN = 97.412kHz A + IN –20 SFDR = 93.3dB HOLD SINAD = 73dB ZEROING SWITCHES C – SAMPLE HOLD – 40 SAMPLE A – IN HOLD – 60 HOLD C + DAC AMPLITUDE (dB) – 80 + –100 C – + DAC COMP VDAC – –120 0 200 400 600 800 1000 1200 1400 FREQUENCY (kHz) V – DAC 12 1412 F02a OUTPUT • D11 SAR • LATCHES • D0
Figure 2a. LTC1412 Nonaveraged, 4096 Point FFT, Input Frequency = 100kHz
1412 F01
Figure 1. Simplified Block Diagram
0 fSMPL = 3Msps fIN = 1.419kHz –20 SFDR = 83dB sample-and-hold capacitors to acquire the analog signal. SINAD = 72.5dB SNR = 73db During the convert phase the comparator zeroing switches – 40 open, putting the comparator into compare mode. The – 60 input switches connect the CSAMPLE capacitors to ground, transferring the differential analog input charge onto the AMPLITUDE (dB) – 80 summing junction. This input charge is successively com- –100 pared with the binary-weighted charges supplied by the differential capacitive DAC. Bit decisions are made by the –120 0 200 400 600 800 1000 1200 1400 high speed comparator. At the end of a conversion, the FREQUENCY (kHz) differential DAC output balances the A + and A – input 1412 F02B IN IN charges. The SAR contents (a 12-bit data word) which
Figure 2b. LTC1412 Nonaveraged, 4096 Point FFT,
represents the difference of A + – IN and AIN are loaded into
Input Frequency = 1.45MHz
the 12-bit output latches. to frequencies from above DC and below half the sampling frequency. Figure 2 shows a typical spectral content with
Dynamic Performance
a 3MHz sampling rate and a 100kHz input. The dynamic The LTC1412 has excellent high speed sampling capabil- performance is excellent for input frequencies up to and ity. FFT (Fast Four Transform) test techniques are used to beyond the Nyquist limit of 1.5MHz. test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine
Effective Number of Bits
wave and analyzing the digital output using an FFT algo- The Effective Number of Bits (ENOBs) is a measurement of rithm, the ADC’s spectral content can be examined for the resolution of an ADC and is directly related to the frequencies outside the fundamental. Figure 2 shows a S/(N + D) by the equation: typical LTC1412 FFT plot. N = [S/(N + D) – 1.76]/6.02
Signal-to-Noise Ratio
where N is the effective number of bits of resolution and The signal-to-noise plus distortion ratio [S/(N + D)] is the S/(N + D) is expressed in dB. At the maximum sampling ratio between the RMS amplitude of the fundamental input rate of 3MHz the LTC1412 maintains near ideal ENOBs up frequency to the RMS amplitude of all other frequency to the Nyquist input frequency of 1.5MHz. Refer to components at the A/D output. The output is band limited Figure␣ 3. 8
U U W U APPLICATIONS INFORMATION
0 C + SAMPLE fSMPL = 3Msps SAMPLE fIN = 97.412kHz A + IN –20 SFDR = 93.3dB HOLD SINAD = 73dB ZEROING SWITCHES C – SAMPLE HOLD – 40 SAMPLE A – IN HOLD – 60 HOLD C + DAC AMPLITUDE (dB) – 80 + –100 C – + DAC COMP VDAC – –120 0 200 400 600 800 1000 1200 1400 FREQUENCY (kHz) V – DAC 12 1412 F02a OUTPUT • D11 SAR • LATCHES • D0
Figure 2a. LTC1412 Nonaveraged, 4096 Point FFT, Input Frequency = 100kHz
1412 F01
Figure 1. Simplified Block Diagram
0 fSMPL = 3Msps fIN = 1.419kHz –20 SFDR = 83dB sample-and-hold capacitors to acquire the analog signal. SINAD = 72.5dB SNR = 73db During the convert phase the comparator zeroing switches – 40 open, putting the comparator into compare mode. The – 60 input switches connect the CSAMPLE capacitors to ground, transferring the differential analog input charge onto the AMPLITUDE (dB) – 80 summing junction. This input charge is successively com- –100 pared with the binary-weighted charges supplied by the differential capacitive DAC. Bit decisions are made by the –120 0 200 400 600 800 1000 1200 1400 high speed comparator. At the end of a conversion, the FREQUENCY (kHz) differential DAC output balances the A + and A – input 1412 F02B IN IN charges. The SAR contents (a 12-bit data word) which
Figure 2b. LTC1412 Nonaveraged, 4096 Point FFT,
represents the difference of A + – IN and AIN are loaded into
Input Frequency = 1.45MHz
the 12-bit output latches. to frequencies from above DC and below half the sampling frequency. Figure 2 shows a typical spectral content with
Dynamic Performance
a 3MHz sampling rate and a 100kHz input. The dynamic The LTC1412 has excellent high speed sampling capabil- performance is excellent for input frequencies up to and ity. FFT (Fast Four Transform) test techniques are used to beyond the Nyquist limit of 1.5MHz. test the ADC’s frequency response, distortion and noise at the rated throughput. By applying a low distortion sine
Effective Number of Bits
wave and analyzing the digital output using an FFT algo- The Effective Number of Bits (ENOBs) is a measurement of rithm, the ADC’s spectral content can be examined for the resolution of an ADC and is directly related to the frequencies outside the fundamental. Figure 2 shows a S/(N + D) by the equation: typical LTC1412 FFT plot. N = [S/(N + D) – 1.76]/6.02
Signal-to-Noise Ratio
where N is the effective number of bits of resolution and The signal-to-noise plus distortion ratio [S/(N + D)] is the S/(N + D) is expressed in dB. At the maximum sampling ratio between the RMS amplitude of the fundamental input rate of 3MHz the LTC1412 maintains near ideal ENOBs up frequency to the RMS amplitude of all other frequency to the Nyquist input frequency of 1.5MHz. Refer to components at the A/D output. The output is band limited Figure␣ 3. 8
