Datasheet LTC2215, LTC2215 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 16-Bit, 65Msps Low Noise ADC |
| Pages / Page | 36 / 6 — POWER REQUIREMENTS. The. denotes the specifi cations which apply over the … |
| File Format / Size | PDF / 1.7 Mb |
| Document Language | English |
POWER REQUIREMENTS. The. denotes the specifi cations which apply over the full operating temperature
Model Line for this Datasheet
Text Version of Document
LTC2216/LTC2215
POWER REQUIREMENTS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. AIN = –1dBFS unless otherwise noted. (Note 4) LTC2215 LTC2216 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VDD Analog Supply Voltage (Note 8) l 3.135 3.3 3.465 3.135 3.3 3.465 V PSHDN Shutdown Power SHDN = VDD 17 17 mW
Standard LVDS Output Mode
OVDD Output Supply Voltage (Note 8) l 3 3.3 3.6 3 3.3 3.6 V IVDD Analog Supply Current l 217 290 300 370 mA IOVDD Output Supply Current l 75 90 75 90 mA PDIS Power Dissipation l 964 1254 1240 1518 mW
Low Power LVDS Output Mode
OVDD Output Supply Voltage (Note 8) l 3 3.3 3.6 3 3.3 3.6 V IVDD Analog Supply Current l 215 290 298 370 mA IOVDD Output Supply Current l 42 50 42 50 mA PDIS Power Dissipation l 848 1122 1120 1386 mW
CMOS Output Mode
OVDD Output Supply Voltage (Note 8) l 0.5 3.6 0.5 3.6 V IVDD Analog Supply Current l 212 290 295 370 mA PDIS Power Dissipation l 700 957 970 1220 mW
The TIMING CHARACTERISTICS
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 4) LTC2215 LTC2216 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
fS Sampling Frequency (Note 8) l 1 65 1 80 MHz tL ENC Low Time Duty Cycle Stabilizer Off (Note 7) l 7.31 7.692 500 5.94 6.25 500 ns Duty Cycle Stabilizer On (Note 7) l 5 7.692 500 4.06 6.25 500 ns tH ENC High Time Duty Cycle Stabilizer Off (Note 7) l 7.31 7.692 500 5.94 6.25 500 ns Duty Cycle Stabilizer On (Note 7) l 5 7.692 500 4.06 6.25 500 ns
LVDS Output Mode (Standard and Low Power)
tD ENC to DATA Delay (Note 7) l 1.3 2.5 3.8 1.3 2.5 3.8 ns tC ENC to CLKOUT Delay (Note 7) l 1.3 2.5 3.8 1.3 2.5 3.8 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) l –0.6 0 0.6 –0.6 0 0.6 ns tRISE Output Rise Time 0.5 0.5 ns tFALL Output Fall Time 0.5 0.5 ns Data Latency Data Latency 7 7 Cycles
CMOS Output Mode
tD ENC to DATA Delay (Note 7) l 1.3 2.7 4 1.3 2.7 4 ns tC ENC to CLKOUT Delay (Note 7) l 1.3 2.7 4 1.3 2.7 4 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) l –0.6 0 0.6 –0.6 0 0.6 ns Data Latency Data Latency Full Rate CMOS 7 7 Cycles Demuxed 7 7 Cycles 22165f 6
POWER REQUIREMENTS The
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. AIN = –1dBFS unless otherwise noted. (Note 4) LTC2215 LTC2216 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
VDD Analog Supply Voltage (Note 8) l 3.135 3.3 3.465 3.135 3.3 3.465 V PSHDN Shutdown Power SHDN = VDD 17 17 mW
Standard LVDS Output Mode
OVDD Output Supply Voltage (Note 8) l 3 3.3 3.6 3 3.3 3.6 V IVDD Analog Supply Current l 217 290 300 370 mA IOVDD Output Supply Current l 75 90 75 90 mA PDIS Power Dissipation l 964 1254 1240 1518 mW
Low Power LVDS Output Mode
OVDD Output Supply Voltage (Note 8) l 3 3.3 3.6 3 3.3 3.6 V IVDD Analog Supply Current l 215 290 298 370 mA IOVDD Output Supply Current l 42 50 42 50 mA PDIS Power Dissipation l 848 1122 1120 1386 mW
CMOS Output Mode
OVDD Output Supply Voltage (Note 8) l 0.5 3.6 0.5 3.6 V IVDD Analog Supply Current l 212 290 295 370 mA PDIS Power Dissipation l 700 957 970 1220 mW
The TIMING CHARACTERISTICS
l
denotes the specifi cations which apply over the full operating temperature range, otherwise specifi cations are at TA = 25°C. (Note 4) LTC2215 LTC2216 SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
fS Sampling Frequency (Note 8) l 1 65 1 80 MHz tL ENC Low Time Duty Cycle Stabilizer Off (Note 7) l 7.31 7.692 500 5.94 6.25 500 ns Duty Cycle Stabilizer On (Note 7) l 5 7.692 500 4.06 6.25 500 ns tH ENC High Time Duty Cycle Stabilizer Off (Note 7) l 7.31 7.692 500 5.94 6.25 500 ns Duty Cycle Stabilizer On (Note 7) l 5 7.692 500 4.06 6.25 500 ns
LVDS Output Mode (Standard and Low Power)
tD ENC to DATA Delay (Note 7) l 1.3 2.5 3.8 1.3 2.5 3.8 ns tC ENC to CLKOUT Delay (Note 7) l 1.3 2.5 3.8 1.3 2.5 3.8 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) l –0.6 0 0.6 –0.6 0 0.6 ns tRISE Output Rise Time 0.5 0.5 ns tFALL Output Fall Time 0.5 0.5 ns Data Latency Data Latency 7 7 Cycles
CMOS Output Mode
tD ENC to DATA Delay (Note 7) l 1.3 2.7 4 1.3 2.7 4 ns tC ENC to CLKOUT Delay (Note 7) l 1.3 2.7 4 1.3 2.7 4 ns tSKEW DATA to CLKOUT Skew (tC-tD) (Note 7) l –0.6 0 0.6 –0.6 0 0.6 ns Data Latency Data Latency Full Rate CMOS 7 7 Cycles Demuxed 7 7 Cycles 22165f 6
