Datasheet LTC2321-12 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | Dual, 12-Bit + Sign, 2Msps Differential Input ADC with Wide Input Common Mode Range |
| Pages / Page | 26 / 1 — FEATURES. DESCRIPTION. 2Msps Throughput Rate. ±0.5LSB INL (Typ). … |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
FEATURES. DESCRIPTION. 2Msps Throughput Rate. ±0.5LSB INL (Typ). Guaranteed 12-Bit, No Missing Codes
Model Line for this Datasheet
Text Version of Document
LTC2321-12 Dual, 12-Bit + Sign, 2Msps Differential Input ADC with Wide Input Common Mode Range
FEATURES DESCRIPTION
n
2Msps Throughput Rate
The LTC®2321-12 is a low noise, high speed dual 12-bit + n
±0.5LSB INL (Typ)
sign successive approximation register (SAR) ADC with n
Guaranteed 12-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input Common
Operating from a single 3.3V or 5V supply, the LTC2321-12
Mode Range
has an 8VP-P differential input range, making it ideal for n
73dB SNR (Typ) at fIN = 500kHz
applications which require a wide dynamic range with n
–85dB THD (Typ) at fIN = 500kHz
high common mode rejection. The LTC2321-12 achieves n Guaranteed Operation to 125°C ±0.5LSB INL typical, no missing codes at 12 bits and n Single 3.3V or 5V Supply 73dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal The LTC2321-12 has an onboard low drift (20ppm/°C max) Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2321-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 30mW/Ch (Typ) 2Msps per channel throughput with zero cycle latency n Small 28-Lead (4mm × 5mm) QFN Package makes the LTC2321-12 ideally suited for a wide variety of high speed applications. The LTC2321-12 dissipates only
APPLICATIONS
30mW per channel and offers nap and sleep modes to n reduce the power consumption to 5μW for further power High Speed Data Acquisition Systems n savings during inactive periods. Communications n Remote Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their respective owners. n Imaging n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 32k Point FFT f DIFFERENTIAL INPUTS
3.3V OR 5V
S = 2Msps, fIN = 500klHz NO CONFIGURATION REQUIRED
0
IN+, IN–
10µF SNR = 72.9dB THD = –86.1dB –20 INSTRUMENTATION DIFFERENTIAL SINAD = 72.8dB V REFOUT1 25Ω DD 10µF SFDR = 89.5dB AIN1+ –40 VBYP1 1µF
LTC2321-12
0V 0V –60 220pF REFOUT2 10µF VBYP2 –80 BIPOLAR UNIPOLAR 1µF 25Ω AMPLITUDE (dBFS) –100 A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC AIN2– CLKOUT (FPGA, CPLD, –120 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV GND OGND OV –140 DD 1.8V TO 2.5V 0 0.2 0.4 0.6 0.8 1 1µF FREQUENCY (MHz) 232112 TA01a 232112 TA01b 232112fb For more information www.linear.com/LTC2321-12 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts
FEATURES DESCRIPTION
n
2Msps Throughput Rate
The LTC®2321-12 is a low noise, high speed dual 12-bit + n
±0.5LSB INL (Typ)
sign successive approximation register (SAR) ADC with n
Guaranteed 12-Bit, No Missing Codes
differential inputs and wide input common mode range. n
8VP-P Differential Inputs with Wide Input Common
Operating from a single 3.3V or 5V supply, the LTC2321-12
Mode Range
has an 8VP-P differential input range, making it ideal for n
73dB SNR (Typ) at fIN = 500kHz
applications which require a wide dynamic range with n
–85dB THD (Typ) at fIN = 500kHz
high common mode rejection. The LTC2321-12 achieves n Guaranteed Operation to 125°C ±0.5LSB INL typical, no missing codes at 12 bits and n Single 3.3V or 5V Supply 73dB SNR. n Low Drift (20ppm/°C Max) 2.048V or 4.096V Internal The LTC2321-12 has an onboard low drift (20ppm/°C max) Reference 2.048V or 4.096V temperature-compensated reference. n 1.8V to 2.5V I/O Voltages The LTC2321-12 also has a high speed SPI-compatible n CMOS or LVDS SPI-Compatible Serial I/O serial interface that supports CMOS or LVDS. The fast n Power Dissipation 30mW/Ch (Typ) 2Msps per channel throughput with zero cycle latency n Small 28-Lead (4mm × 5mm) QFN Package makes the LTC2321-12 ideally suited for a wide variety of high speed applications. The LTC2321-12 dissipates only
APPLICATIONS
30mW per channel and offers nap and sleep modes to n reduce the power consumption to 5μW for further power High Speed Data Acquisition Systems n savings during inactive periods. Communications n Remote Data Acquisition L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their respective owners. n Imaging n Optical Networking n Automotive n Multiphase Motor Control
TYPICAL APPLICATION 32k Point FFT f DIFFERENTIAL INPUTS
3.3V OR 5V
S = 2Msps, fIN = 500klHz NO CONFIGURATION REQUIRED
0
IN+, IN–
10µF SNR = 72.9dB THD = –86.1dB –20 INSTRUMENTATION DIFFERENTIAL SINAD = 72.8dB V REFOUT1 25Ω DD 10µF SFDR = 89.5dB AIN1+ –40 VBYP1 1µF
LTC2321-12
0V 0V –60 220pF REFOUT2 10µF VBYP2 –80 BIPOLAR UNIPOLAR 1µF 25Ω AMPLITUDE (dBFS) –100 A SDO1 IN1– TO CONTROL AIN2+ SDO2 LOGIC AIN2– CLKOUT (FPGA, CPLD, –120 0V 0V V CMOS/LVDS SCK DSP, ETC.) DD REFINT CNV GND OGND OV –140 DD 1.8V TO 2.5V 0 0.2 0.4 0.6 0.8 1 1µF FREQUENCY (MHz) 232112 TA01a 232112 TA01b 232112fb For more information www.linear.com/LTC2321-12 1 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Digital Outputs Power Requirements ADC Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagram Applications Information Package Description Related Parts
