Datasheet LTC2392-16 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 16-Bit, 500ksps SAR ADC with 94dB SNR |
| Pages / Page | 26 / 8 — pin Functions. GND (Pins 1, 5, 7, 20, 35, 41, 44, 48, Exposed Pad Pin. D6 … |
| File Format / Size | PDF / 321 Kb |
| Document Language | English |
pin Functions. GND (Pins 1, 5, 7, 20, 35, 41, 44, 48, Exposed Pad Pin. D6 (Pin 15):. 49):. D7 (Pin 16):
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Text Version of Document
LTC2392-16
pin Functions GND (Pins 1, 5, 7, 20, 35, 41, 44, 48, Exposed Pad Pin D6 (Pin 15):
Data Bit 6. When SER/PAR = 0 this pin is
49):
Ground. All GND pins must be connected to a solid Bit 6 of the parallel port data output bus. ground plane. Exposed pad must be soldered directly to
D7 (Pin 16):
Data Bit 7. When SER/PAR = 0 this pin is the ground plane. Bit 7 of the parallel port data output bus.
AVP (Pins 2, 40, 45, 46, 47):
5V Analog Power Supply.
OGND (Pin 17):
Digital Ground for the Input/Output The range of AVP is 4.75V to 5.25V. Bypass AVP to GND Interface. with a good quality 0.1µF and a 10µF ceramic capacitor in parallel.
OVP (Pin 18):
Digital Power Supply for the Input/Output Interface. The range for OVP is 1.8V to 5V. Bypass OVP
DVP (Pins 3, 19):
5V Digital Power Supply. The range of to OGND with a good quality 4.7µF ceramic capacitor DVP is 4.75V to 5.25V. Bypass DVP to GND with a good close to the pin. quality 0.1µF and a 10µF ceramic capacitor in parallel.
D8 (Pin 21):
Data Bit 8. When SER/PAR = 0 this pin is
SER/PAR (Pin 4):
Serial/Parallel Selection Input. This pin Bit 8 of the parallel port data output bus. controls the digital interface. A logic high on this pin se- lects the serial interface and a logic low selects the parallel
D9/SDIN (Pin 22):
Data Bit 9/Serial Data Input. When SER/ interface. In the serial mode the non-active digital outputs PAR = 0 this pin is Bit 9 of the parallel port data output bus. are high impedance. When SER/PAR = 1, (serial mode) this is the serial data input. SDIN can be used as a data input to daisy chain two
OB/2C (Pin 6):
Offset Binary/Two’s Complement Input. or more conversion results into a single SDOUT line. The When OB/2C is high, the digital output is offset binary. digital data level on SDIN is output on SDOUT with a delay When low, the MSB is inverted resulting in two’s comple- of 16 SCLK periods after the start of the read sequence. ment output.
D10/SDOUT (Pin 23):
Data Bit 10/Serial Data Output. When
BYTESWAP (Pin 8):
BYTESWAP Input. With BYTESWAP SER/PAR = 0 this pin is Bit 10 of the parallel port data low, data will be output with Pin 28 (D15) being the MSB output bus. When SER/PAR = 1, (serial mode) this is the and Pin 9 (D0) being the LSB. With BYTESWAP high, the serial data output. The conversion result can be clocked upper eight bits and the lower eight bits will be switched. out serially on this pin synchronized to SCLK. The data The MSB is output on Pin 16 and Bit 8 is output on Pin 9. is clocked out MSB first on the rising edge of SCLK and Bit 7 is output on Pin 28 and the LSB is output on Pin 21. is valid on the falling edge of SCLK. The data format is
D0 (Pin 9):
Data Bit 0. When SER/PAR = 0 this pin is Bit 0 determined by the logic level of OB/2C. of the parallel port data output bus.
D11/SCLK (Pin 24):
Data Bit 11/Serial Clock Input. When
D1 (Pin 10):
Data Bit 1. When SER/PAR = 0 this pin is SER/PAR = 0 this pin is Bit 11 of the parallel port data Bit 1 of the parallel port data output bus. output bus. When SER/PAR = 1, (serial mode) this is the
D2 (Pin 11):
Data Bit 2. When SER/PAR = 0 this pin is serial clock input. Bit 2 of the parallel port data output bus.
D12 (Pin 25):
Data Bit 12. When SER/PAR = 0 this pin is
D3 (Pin 12):
Data Bit 3. When SER/PAR = 0 this pin is Bit 12 of the parallel port data output bus. Bit 3 of the parallel port data output bus.
D13 (Pin 26):
Data Bit 13. When SER/PAR = 0 this pin is
D4 (Pin 13):
Data Bit 4. When SER/PAR = 0 this pin is Bit 13 of the parallel port data output bus. Bit 4 of the parallel port data output bus.
D14 (Pin 27):
Data Bit 14. When SER/PAR = 0 this pin is
D5 (Pin 14):
Data Bit 5. When SER/PAR = 0 this pin is Bit 14 of the parallel port data output bus. Bit 5 of the parallel port data output bus. 239216fa 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Analog Input Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagrams Applications Information Package Description Revision History Typical Application Related Parts
pin Functions GND (Pins 1, 5, 7, 20, 35, 41, 44, 48, Exposed Pad Pin D6 (Pin 15):
Data Bit 6. When SER/PAR = 0 this pin is
49):
Ground. All GND pins must be connected to a solid Bit 6 of the parallel port data output bus. ground plane. Exposed pad must be soldered directly to
D7 (Pin 16):
Data Bit 7. When SER/PAR = 0 this pin is the ground plane. Bit 7 of the parallel port data output bus.
AVP (Pins 2, 40, 45, 46, 47):
5V Analog Power Supply.
OGND (Pin 17):
Digital Ground for the Input/Output The range of AVP is 4.75V to 5.25V. Bypass AVP to GND Interface. with a good quality 0.1µF and a 10µF ceramic capacitor in parallel.
OVP (Pin 18):
Digital Power Supply for the Input/Output Interface. The range for OVP is 1.8V to 5V. Bypass OVP
DVP (Pins 3, 19):
5V Digital Power Supply. The range of to OGND with a good quality 4.7µF ceramic capacitor DVP is 4.75V to 5.25V. Bypass DVP to GND with a good close to the pin. quality 0.1µF and a 10µF ceramic capacitor in parallel.
D8 (Pin 21):
Data Bit 8. When SER/PAR = 0 this pin is
SER/PAR (Pin 4):
Serial/Parallel Selection Input. This pin Bit 8 of the parallel port data output bus. controls the digital interface. A logic high on this pin se- lects the serial interface and a logic low selects the parallel
D9/SDIN (Pin 22):
Data Bit 9/Serial Data Input. When SER/ interface. In the serial mode the non-active digital outputs PAR = 0 this pin is Bit 9 of the parallel port data output bus. are high impedance. When SER/PAR = 1, (serial mode) this is the serial data input. SDIN can be used as a data input to daisy chain two
OB/2C (Pin 6):
Offset Binary/Two’s Complement Input. or more conversion results into a single SDOUT line. The When OB/2C is high, the digital output is offset binary. digital data level on SDIN is output on SDOUT with a delay When low, the MSB is inverted resulting in two’s comple- of 16 SCLK periods after the start of the read sequence. ment output.
D10/SDOUT (Pin 23):
Data Bit 10/Serial Data Output. When
BYTESWAP (Pin 8):
BYTESWAP Input. With BYTESWAP SER/PAR = 0 this pin is Bit 10 of the parallel port data low, data will be output with Pin 28 (D15) being the MSB output bus. When SER/PAR = 1, (serial mode) this is the and Pin 9 (D0) being the LSB. With BYTESWAP high, the serial data output. The conversion result can be clocked upper eight bits and the lower eight bits will be switched. out serially on this pin synchronized to SCLK. The data The MSB is output on Pin 16 and Bit 8 is output on Pin 9. is clocked out MSB first on the rising edge of SCLK and Bit 7 is output on Pin 28 and the LSB is output on Pin 21. is valid on the falling edge of SCLK. The data format is
D0 (Pin 9):
Data Bit 0. When SER/PAR = 0 this pin is Bit 0 determined by the logic level of OB/2C. of the parallel port data output bus.
D11/SCLK (Pin 24):
Data Bit 11/Serial Clock Input. When
D1 (Pin 10):
Data Bit 1. When SER/PAR = 0 this pin is SER/PAR = 0 this pin is Bit 11 of the parallel port data Bit 1 of the parallel port data output bus. output bus. When SER/PAR = 1, (serial mode) this is the
D2 (Pin 11):
Data Bit 2. When SER/PAR = 0 this pin is serial clock input. Bit 2 of the parallel port data output bus.
D12 (Pin 25):
Data Bit 12. When SER/PAR = 0 this pin is
D3 (Pin 12):
Data Bit 3. When SER/PAR = 0 this pin is Bit 12 of the parallel port data output bus. Bit 3 of the parallel port data output bus.
D13 (Pin 26):
Data Bit 13. When SER/PAR = 0 this pin is
D4 (Pin 13):
Data Bit 4. When SER/PAR = 0 this pin is Bit 13 of the parallel port data output bus. Bit 4 of the parallel port data output bus.
D14 (Pin 27):
Data Bit 14. When SER/PAR = 0 this pin is
D5 (Pin 14):
Data Bit 5. When SER/PAR = 0 this pin is Bit 14 of the parallel port data output bus. Bit 5 of the parallel port data output bus. 239216fa 8 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Analog Input Converter Characteristics Dynamic Accuracy Internal Reference Characteristics Digital Inputs and Digital Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Functional Block Diagram Timing Diagrams Applications Information Package Description Revision History Typical Application Related Parts
