Datasheet LTM9008-14, LTM9007-14, LTM9006-14 (Analog Devices)
| Manufacturer | Analog Devices |
| Description | 14-Bit, 65Msps Low Power Octal ADCs |
| Pages / Page | 38 / 1 — FEATURES. DESCRIPTION. 8-Channel Simultaneous Sampling ADC. 73dB SNR. … |
| File Format / Size | PDF / 1.1 Mb |
| Document Language | English |
FEATURES. DESCRIPTION. 8-Channel Simultaneous Sampling ADC. 73dB SNR. 90dB SFDR. APPLICATIONS. TYPICAL APPLICATION
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Text Version of Document
LTM9008-14/ LTM9007-14/LTM9006-14 14-Bit, 65Msps/40Msps/ 25Msps Low Power Octal ADCs
FEATURES DESCRIPTION
n
8-Channel Simultaneous Sampling ADC
The LTM®9008-14/LTM9007-14/LTM9006-14 are 8-chan- n
73dB SNR
nel, simultaneous sampling 14-bit A/D converters designed n
90dB SFDR
for digitizing high frequency, wide dynamic range signals. n Low Power: 88mW/59mW/46mW per Channel AC performance includes 73dB SNR and 90dB spurious n Single 1.8V Supply free dynamic range (SFDR). Low power consumption per n Serial LVDS Outputs: 1 or 2 Bits per Channel channel reduces heat in high channel count applications. n Selectable Input Ranges: 1V Integrated bypass capacitance and flowthrough pinout P-P to 2VP-P n 800MHz Full Power Bandwidth S/H reduces overall board space requirements. n Shutdown and Nap Modes DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) n Serial SPI Port for Configuration and no missing codes over temperature. The transition n Internal Bypass Capacitance, No External noise is a low 1.2LSBRMS. Components n The digital outputs are serial LVDS to minimize the num- 140-Pin (11.25mm × 9mm) BGA Package ber of data lines. Each channel outputs two bits at a time
APPLICATIONS
(2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). n Communications n The ENC+ and ENC– inputs may be driven differentially Cellular Base Stations n or single-ended with a sine wave, PECL, LVDS, TTL, or Software Defined Radios n CMOS inputs. An internal clock duty cycle stabilizer al- Portable Medical Imaging n lows high performance at full speed for a wide range of Multichannel Data Acquisition n clock duty cycles. Nondestructive Testing L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V 1.8V
LTM9008-14, 65Msps,
VDD OVDD
2-Tone FFT, fIN = 70MHz and 75MHz
CHANNEL 1 14-BIT OUT1A 0 ANALOG S/H ADC CORE INPUT OUT1B –10 –20 CHANNEL 2 14-BIT OUT2A –30 ANALOG S/H ADC CORE INPUT OUT2B –40 DATA –50 SERIALIZER SERIALIZED LVDS • • • • • • • • • • • • –60 OUTPUTS –70 CHANNEL 8 OUT8A 14-BIT ANALOG S/H AMPLITUDE (dBFS) –80 ADC CORE OUT8B INPUT –90 DATA –100 CLOCK ENCODE PLL OUT –110 INPUT –120 FRAME 0 10 20 30 90067814 TA01 FREQUENCY (MHz) GND GND 90067814 TA01b 90067814fb For more information www.linear.com/LTM9008-14 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Pin Configuration Table Functional Block Diagram Applications Information Package Description Related Parts
FEATURES DESCRIPTION
n
8-Channel Simultaneous Sampling ADC
The LTM®9008-14/LTM9007-14/LTM9006-14 are 8-chan- n
73dB SNR
nel, simultaneous sampling 14-bit A/D converters designed n
90dB SFDR
for digitizing high frequency, wide dynamic range signals. n Low Power: 88mW/59mW/46mW per Channel AC performance includes 73dB SNR and 90dB spurious n Single 1.8V Supply free dynamic range (SFDR). Low power consumption per n Serial LVDS Outputs: 1 or 2 Bits per Channel channel reduces heat in high channel count applications. n Selectable Input Ranges: 1V Integrated bypass capacitance and flowthrough pinout P-P to 2VP-P n 800MHz Full Power Bandwidth S/H reduces overall board space requirements. n Shutdown and Nap Modes DC specs include ±1LSB INL (typ), ±0.3LSB DNL (typ) n Serial SPI Port for Configuration and no missing codes over temperature. The transition n Internal Bypass Capacitance, No External noise is a low 1.2LSBRMS. Components n The digital outputs are serial LVDS to minimize the num- 140-Pin (11.25mm × 9mm) BGA Package ber of data lines. Each channel outputs two bits at a time
APPLICATIONS
(2-lane mode). At lower sampling rates there is a one bit per channel option (1-lane mode). n Communications n The ENC+ and ENC– inputs may be driven differentially Cellular Base Stations n or single-ended with a sine wave, PECL, LVDS, TTL, or Software Defined Radios n CMOS inputs. An internal clock duty cycle stabilizer al- Portable Medical Imaging n lows high performance at full speed for a wide range of Multichannel Data Acquisition n clock duty cycles. Nondestructive Testing L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
1.8V 1.8V
LTM9008-14, 65Msps,
VDD OVDD
2-Tone FFT, fIN = 70MHz and 75MHz
CHANNEL 1 14-BIT OUT1A 0 ANALOG S/H ADC CORE INPUT OUT1B –10 –20 CHANNEL 2 14-BIT OUT2A –30 ANALOG S/H ADC CORE INPUT OUT2B –40 DATA –50 SERIALIZER SERIALIZED LVDS • • • • • • • • • • • • –60 OUTPUTS –70 CHANNEL 8 OUT8A 14-BIT ANALOG S/H AMPLITUDE (dBFS) –80 ADC CORE OUT8B INPUT –90 DATA –100 CLOCK ENCODE PLL OUT –110 INPUT –120 FRAME 0 10 20 30 90067814 TA01 FREQUENCY (MHz) GND GND 90067814 TA01b 90067814fb For more information www.linear.com/LTM9008-14 1 Document Outline Features Description Applications Typical Application Absolute Maximum Ratings Pin Configuration Order Information Converter Characteristics Analog Input Dynamic Accuracy Internal Reference Characteristics Digital Inputs And Outputs Power Requirements Timing Characteristics Timing Diagrams Typical Performance Characteristics Pin Functions Pin Configuration Table Functional Block Diagram Applications Information Package Description Related Parts
