Datasheet LTM9013 (Analog Devices) - 5
| Manufacturer | Analog Devices |
| Description | 300MHz Wideband Receiver |
| Pages / Page | 38 / 5 — analog. nalog npu. npu s an. s an. D o. o T. u pu. T T. pu s. The. … |
| File Format / Size | PDF / 978 Kb |
| Document Language | English |
analog. nalog npu. npu s an. s an. D o. o T. u pu. T T. pu s. The. denotes the specifications which apply over the full operating
Model Line for this Datasheet
Text Version of Document
LTM9013
analog a i nalog npu i T npu s an T D s an D o u o T u pu T T pu s T The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ADC Analog Inputs (SENSE)
Input Leakage Current 1.1V < SENSE < 1.2V –1 1 μA
Demodulator Analog Outputs (+OUT_I, –OUT_I, +OUT_Q, –OUT_Q)
Common Mode Voltage VCC1 – 1.5V V Differential Output Impedance 50||6 Ω||pF
DigiTal inpuTs anD ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Demodulator Logic Inputs (EN, EIP2)
VIH High Level Input Voltage VCC = 5V l 2 V VIL Low Level Input Voltage VCC = 5V l 0.3 V Input Pull-Up Resistance VCC = 5V, VEN = 4.4V to 2.6V 100 kΩ EIP2 Input Current EIP2 = 5V 40 μA Turn-On Time 0.2 µs Turn-Off Time 0.8 µs
I and Q Channel Logic Inputs (EN_I, EN_Q, SHDN_I, SHDN_Q)
VIH High Level Input Voltage VCC = 3.3V l 2.2 V VIL Low Level Input Voltage VCC = 3.3V l 0.8 V Input Pull-Up Resistance VCC = 3.3V, VEN_I,EN_Q = 0V to 0.5V 100 kΩ Input High Current EN_I, EN_Q = 2.2V, SHDN_I, SHDN_Q = 2.2V –30 –15 –1 µA Input Low Current EN_I, EN_Q = 0.8V, SHDN_I, SHDN_Q = 0.8V –60 –30 –1 µA
ADC Encode Clock Inputs (CLK+, CLK–)
Differential Input Voltage VDD = 1.8V l 0.2 V Common Mode Input Voltage Internally Set 1.2 V Externally Set l 1.1 1.5 V Input Resistance 10 kΩ Input Capacitance (Note 10) 2 pF
ADC Logic Inputs (SDI, SCK, CS)
VIH High Level Input Voltage VDD = 1.8V l 1.3 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V Input Current VIN = 0V to 3.6V l –10 10 μA Input Capacitance (Note 10) 3 pF
ADC Logic Inputs (PAR/SER)
Input Leakage Current 0 < PAR/SER < VDD –1 1 μA
ADC Logic Output (SDO)
Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V 200 Ω Logic High Output Leakage Current SDO = 0V to 3.6V l –10 10 µA Output Capacitance (Note 10) 4 pF 9013fa For more information www.linear.com/LTM9013 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Dynamic Accuracy Analog Inputs and Outputs Digital Inputs and Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
analog a i nalog npu i T npu s an T D s an D o u o T u pu T T pu s T The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS ADC Analog Inputs (SENSE)
Input Leakage Current 1.1V < SENSE < 1.2V –1 1 μA
Demodulator Analog Outputs (+OUT_I, –OUT_I, +OUT_Q, –OUT_Q)
Common Mode Voltage VCC1 – 1.5V V Differential Output Impedance 50||6 Ω||pF
DigiTal inpuTs anD ouTpuTs The
l
denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. (Notes 5, 7) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Demodulator Logic Inputs (EN, EIP2)
VIH High Level Input Voltage VCC = 5V l 2 V VIL Low Level Input Voltage VCC = 5V l 0.3 V Input Pull-Up Resistance VCC = 5V, VEN = 4.4V to 2.6V 100 kΩ EIP2 Input Current EIP2 = 5V 40 μA Turn-On Time 0.2 µs Turn-Off Time 0.8 µs
I and Q Channel Logic Inputs (EN_I, EN_Q, SHDN_I, SHDN_Q)
VIH High Level Input Voltage VCC = 3.3V l 2.2 V VIL Low Level Input Voltage VCC = 3.3V l 0.8 V Input Pull-Up Resistance VCC = 3.3V, VEN_I,EN_Q = 0V to 0.5V 100 kΩ Input High Current EN_I, EN_Q = 2.2V, SHDN_I, SHDN_Q = 2.2V –30 –15 –1 µA Input Low Current EN_I, EN_Q = 0.8V, SHDN_I, SHDN_Q = 0.8V –60 –30 –1 µA
ADC Encode Clock Inputs (CLK+, CLK–)
Differential Input Voltage VDD = 1.8V l 0.2 V Common Mode Input Voltage Internally Set 1.2 V Externally Set l 1.1 1.5 V Input Resistance 10 kΩ Input Capacitance (Note 10) 2 pF
ADC Logic Inputs (SDI, SCK, CS)
VIH High Level Input Voltage VDD = 1.8V l 1.3 V VIL Low Level Input Voltage VDD = 1.8V l 0.6 V Input Current VIN = 0V to 3.6V l –10 10 μA Input Capacitance (Note 10) 3 pF
ADC Logic Inputs (PAR/SER)
Input Leakage Current 0 < PAR/SER < VDD –1 1 μA
ADC Logic Output (SDO)
Logic Low Output Resistance to GND VDD = 1.8V, SDO = 0V 200 Ω Logic High Output Leakage Current SDO = 0V to 3.6V l –10 10 µA Output Capacitance (Note 10) 4 pF 9013fa For more information www.linear.com/LTM9013 5 Document Outline Features Applications Description Typical Application Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Dynamic Accuracy Analog Inputs and Outputs Digital Inputs and Outputs Power Requirements Timing Characteristics Typical Performance Characteristics Pin Functions Block Diagram Timing Diagrams Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
