Datasheet LTC3035 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 300mA VLDO Linear Regulator with Charge Pump Bias Generator |
| Pages / Page | 12 / 8 — APPLICATIO S I FOR ATIO. Figure 5. Ceramic Capacitor DC Bias … |
| File Format / Size | PDF / 224 Kb |
| Document Language | English |
APPLICATIO S I FOR ATIO. Figure 5. Ceramic Capacitor DC Bias Characteristics. Thermal Considerations
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LTC3035
U U W U APPLICATIO S I FOR ATIO
20 BOTH CAPACITORS ARE 1µF, available current, a 0.1µF or greater ceramic capacitor 6.3V, 0402 CASE SIZE should be used. Warning: A polarized capacitor such as 0 tantalum or aluminum should never be used for the flying –20 capacitor since its voltage can reverse upon start-up of the Y5V X5R LTC3035. Low ESR ceramic capacitors should always be –40 used for the flying capacitor. –60 CHANGE IN VALUE (%) A 1µF or greater low ESR (<0.1Ω) ceramic capacitor is –80 recommended to bypass the BIAS pin. Larger values of capacitance will not reduce the size of the BIAS ripple –100 0 1 2 3 4 5 6 much, but will decrease the ripple frequency proportion- DC BIAS VOLTAGE (V) ally. The BIAS pin should maintain 0.4µF of capacitance at 3035 F05 all times to ensure correct operation. High ESR tantalum
Figure 5. Ceramic Capacitor DC Bias Characteristics
and electrolytic capacitors may be used, but a low ESR ceramic must be used in parallel for correct operation. It 20 is also recommended that IN be bypassed to ground with 0 a 1µF or greater ceramic capacitor. X5R –20
Thermal Considerations
Y5V –40 The power handling capability of the device will be limited by the maximum rated junction temperature (125°C). The –60 CHANGE IN VALUE (%) power dissipated by the device will be the output current –80 multiplied by the input/output voltage differential: BOTH CAPACITORS ARE 1µF, 6.3V, 0402 CASE SIZE –100 (IOUT)(VIN – VOUT) –50 –25 0 25 50 75 TEMPERATURE (°C) The LTC3035 has internal thermal limiting designed to 3035 F06 protect the device during momentary overload conditions.
Figure 6. Ceramic Capacitor Temperature Characteristics
For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is temperature range. The X5R only loses about 40% of its important to give careful consideration to all sources of rated capacitance over the operating temperature range. thermal resistance from junction to ambient. Additional The X5R and X7R dielectrics result in more stable charac- heat sources mounted nearby must also be considered. teristics and are more suitable for use as the output capacitor. The X7R type has better stability across tem- For surface mount devices, heat sinking is accomplished perature and bias voltage, while the X5R is less expensive by using the heat-spreading capabilities of the PC board and is available in higher values. In all cases, the output and its copper traces. Copper board stiffeners and plated capacitance should never drop below 0.4µF, or instability through holes can also be used to spread the heat or degraded performance may occur. generated by power devices. A junction to ambient thermal coefficient of 76°C/W is
Charge Pump Component Selection
achieved by connecting the Exposed Pad of the DFN The flying capacitor controls the strength of the charge package directly to a ground plane of about 2500mm2. pump. In order for the charge pump to deliver its maximum 3035f 8
U U W U APPLICATIO S I FOR ATIO
20 BOTH CAPACITORS ARE 1µF, available current, a 0.1µF or greater ceramic capacitor 6.3V, 0402 CASE SIZE should be used. Warning: A polarized capacitor such as 0 tantalum or aluminum should never be used for the flying –20 capacitor since its voltage can reverse upon start-up of the Y5V X5R LTC3035. Low ESR ceramic capacitors should always be –40 used for the flying capacitor. –60 CHANGE IN VALUE (%) A 1µF or greater low ESR (<0.1Ω) ceramic capacitor is –80 recommended to bypass the BIAS pin. Larger values of capacitance will not reduce the size of the BIAS ripple –100 0 1 2 3 4 5 6 much, but will decrease the ripple frequency proportion- DC BIAS VOLTAGE (V) ally. The BIAS pin should maintain 0.4µF of capacitance at 3035 F05 all times to ensure correct operation. High ESR tantalum
Figure 5. Ceramic Capacitor DC Bias Characteristics
and electrolytic capacitors may be used, but a low ESR ceramic must be used in parallel for correct operation. It 20 is also recommended that IN be bypassed to ground with 0 a 1µF or greater ceramic capacitor. X5R –20
Thermal Considerations
Y5V –40 The power handling capability of the device will be limited by the maximum rated junction temperature (125°C). The –60 CHANGE IN VALUE (%) power dissipated by the device will be the output current –80 multiplied by the input/output voltage differential: BOTH CAPACITORS ARE 1µF, 6.3V, 0402 CASE SIZE –100 (IOUT)(VIN – VOUT) –50 –25 0 25 50 75 TEMPERATURE (°C) The LTC3035 has internal thermal limiting designed to 3035 F06 protect the device during momentary overload conditions.
Figure 6. Ceramic Capacitor Temperature Characteristics
For continuous normal conditions, the maximum junction temperature rating of 125°C must not be exceeded. It is temperature range. The X5R only loses about 40% of its important to give careful consideration to all sources of rated capacitance over the operating temperature range. thermal resistance from junction to ambient. Additional The X5R and X7R dielectrics result in more stable charac- heat sources mounted nearby must also be considered. teristics and are more suitable for use as the output capacitor. The X7R type has better stability across tem- For surface mount devices, heat sinking is accomplished perature and bias voltage, while the X5R is less expensive by using the heat-spreading capabilities of the PC board and is available in higher values. In all cases, the output and its copper traces. Copper board stiffeners and plated capacitance should never drop below 0.4µF, or instability through holes can also be used to spread the heat or degraded performance may occur. generated by power devices. A junction to ambient thermal coefficient of 76°C/W is
Charge Pump Component Selection
achieved by connecting the Exposed Pad of the DFN The flying capacitor controls the strength of the charge package directly to a ground plane of about 2500mm2. pump. In order for the charge pump to deliver its maximum 3035f 8
