Datasheet LT3471 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | Dual 1.3A, 1.2MHz Boost/Inverter in 3mm × 3mm DFN |
| Pages / Page | 16 / 9 — APPLICATIONS INFORMATION. VREG VOLTAGE REFERENCE. Figure 3. Transient … |
| File Format / Size | PDF / 307 Kb |
| Document Language | English |
APPLICATIONS INFORMATION. VREG VOLTAGE REFERENCE. Figure 3. Transient Response of Figure 2’s Step-Up
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LT3471
APPLICATIONS INFORMATION
By choosing the appropriate values for the resistor and
VREG VOLTAGE REFERENCE
capacitor, the zero frequency can be designed to improve Pin 3 of the LT3471 is a bandgap voltage reference that has the phase margin of the overall converter. The typical been divided down to 1.00V and buffered for external use. target value for the zero frequency is between 35kHz This pin must be bypassed with at least 0.01μF and no more to 55kHz. Figure 3 shows the transient response of the than 1μF. This will ensure stability as well as reduce the step-up converter from Figure 2 without the phase lead noise on this pin. The buffer has a built-in current limit of at capacitor CPL. Although adequate for many applications, least 1mA (typically 1.4mA). This not only means that you phase margin is not ideal as evidenced by 2-3 “bumps” can use this pin as an external reference for supplemental in both the output voltage and inductor current. A 33pF circuitry, but it also means that it is possible to provide a capacitor for CPL results in ideal phase margin, which soft-start feature if this pin is used as one of the feedback is revealed in Figure 4 as a more damped response and pins for the error amplifi er. Normally the soft-start time less overshoot. will be dominated by the RC time constant discussed in the soft-start and shutdown section. However, because of the fi nite current limit of the buffer for the VREG pin, it will VOUT take some time to charge up the bypass capacitor. During 200mV/DIV AC COUPLED this time, the voltage at the VREG pin will ramp up, and VIN = 3.3V this action provides an alternate means for soft-starting I the circuit. If the largest recommended bypass capacitor L1 0.5A/DIV is used, 1μF, the worst-case (longest) soft-start function AC/COUPLED that would be provided from the VREF pin is: LOAD CURRENT VIN > VSHDN/SS 100mA/DIV AC/COUPLED 1μF • 1.00V =1.0ms 50μs/DIV 1.0mA
Figure 3. Transient Response of Figure 2’s Step-Up
Choose the RC network such that the soft-start time is
Converter without Phase Lead Capacitor
longer than this time, or choose a smaller bypass capacitor for the VREF pin (but always larger than 0.01μF) so that the RC network dominates the soft-starting of the LT3471. The voltage at the VREF pin can also be divided down and used VOUT for one of the feedback pins for the error amplifi er. This 200mV/DIV AC COUPLED is especially useful in LED driver applications, where the VIN = 3.3V current through the LEDs is set using the voltage reference across a sense resistor in the LED chain. Using a smaller IL1 0.5A/DIV or divided down reference leads to less wasted power in AC/COUPLED the sense resistor. See the Typical Applications section LOAD CURRENT VIN > VSHDN/SS 100mA/DIV for an example of LED driving applications. AC/COUPLED 50μs/DIV
Figure 4. Transient Response of Figure 2’s Step-Up Converter with 33pF Phase Lead Capacitor
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APPLICATIONS INFORMATION
By choosing the appropriate values for the resistor and
VREG VOLTAGE REFERENCE
capacitor, the zero frequency can be designed to improve Pin 3 of the LT3471 is a bandgap voltage reference that has the phase margin of the overall converter. The typical been divided down to 1.00V and buffered for external use. target value for the zero frequency is between 35kHz This pin must be bypassed with at least 0.01μF and no more to 55kHz. Figure 3 shows the transient response of the than 1μF. This will ensure stability as well as reduce the step-up converter from Figure 2 without the phase lead noise on this pin. The buffer has a built-in current limit of at capacitor CPL. Although adequate for many applications, least 1mA (typically 1.4mA). This not only means that you phase margin is not ideal as evidenced by 2-3 “bumps” can use this pin as an external reference for supplemental in both the output voltage and inductor current. A 33pF circuitry, but it also means that it is possible to provide a capacitor for CPL results in ideal phase margin, which soft-start feature if this pin is used as one of the feedback is revealed in Figure 4 as a more damped response and pins for the error amplifi er. Normally the soft-start time less overshoot. will be dominated by the RC time constant discussed in the soft-start and shutdown section. However, because of the fi nite current limit of the buffer for the VREG pin, it will VOUT take some time to charge up the bypass capacitor. During 200mV/DIV AC COUPLED this time, the voltage at the VREG pin will ramp up, and VIN = 3.3V this action provides an alternate means for soft-starting I the circuit. If the largest recommended bypass capacitor L1 0.5A/DIV is used, 1μF, the worst-case (longest) soft-start function AC/COUPLED that would be provided from the VREF pin is: LOAD CURRENT VIN > VSHDN/SS 100mA/DIV AC/COUPLED 1μF • 1.00V =1.0ms 50μs/DIV 1.0mA
Figure 3. Transient Response of Figure 2’s Step-Up
Choose the RC network such that the soft-start time is
Converter without Phase Lead Capacitor
longer than this time, or choose a smaller bypass capacitor for the VREF pin (but always larger than 0.01μF) so that the RC network dominates the soft-starting of the LT3471. The voltage at the VREF pin can also be divided down and used VOUT for one of the feedback pins for the error amplifi er. This 200mV/DIV AC COUPLED is especially useful in LED driver applications, where the VIN = 3.3V current through the LEDs is set using the voltage reference across a sense resistor in the LED chain. Using a smaller IL1 0.5A/DIV or divided down reference leads to less wasted power in AC/COUPLED the sense resistor. See the Typical Applications section LOAD CURRENT VIN > VSHDN/SS 100mA/DIV for an example of LED driving applications. AC/COUPLED 50μs/DIV
Figure 4. Transient Response of Figure 2’s Step-Up Converter with 33pF Phase Lead Capacitor
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