Datasheet LT3472 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Boost and Inverting DC/DC Converter for CCD Bias |
| Pages / Page | 12 / 8 — APPLICATIO S I FOR ATIO. Soft-Start. Table 4. Recommended Schottky … |
| File Format / Size | PDF / 233 Kb |
| Document Language | English |
APPLICATIO S I FOR ATIO. Soft-Start. Table 4. Recommended Schottky Diodes. Forward. Diode. Current. Voltage. Capacitance. Part No. (mA)
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Text Version of Document
LT3472
U U W U APPLICATIO S I FOR ATIO
and larger capacitance, which can cause significant switch- In order to maintain accuracy, high precision resistors are ing losses at 1.1MHz switching frequency. Some recom- preferred (1% is recommended). mended Schottky diodes are listed in Table 4.
Soft-Start Table 4. Recommended Schottky Diodes
The LT3472 has independent soft-start control for each
Forward Forward Diode
channel. As shown in Figure 1, the SSP and SSN pins have
Current Voltage Capacitance Part No. (mA) Drop (V) (pF) Manufacturer
an internal resistor of 50k pulling up to 1.25V, respec- CMDSH-3 100 0.58 @100mA 7 @ 10V Central Semiconductor tively. By connecting a capacitor from the SSP or SSN pin CMDSH2-3 200 0.49 @ 200mA 15 @ 10V (631) 435-1110 to ground, the ramp of each output can be programmed www.centralsemi.com individually. If SSP or SSN is open or pull higher than 1.25V, the corresponding output will ramp up quickly. The
Setting the Output Voltages
waveforms with and without soft-start for the Boost channel are shown in Figure 4. The LT3472 has an accurate feedback resistor of 50k for each channel. Only one resistor is needed to set the output The waveforms with and without soft-start for the negative voltage for each channel. The output voltage can be set channel are shown in Figure 5. according to the following formulas:
Start Sequencing
⎛ R1 ⎞ The LT3472 has internal sequencing circuitry that inhibits VPOS = 1 2 . 5 • ⎜1+ ⎟ ⎝ k 50 ⎠ the negative channel from operating until feedback voltage of the step-up channel reaches about 1.1V, ensuring that ⎛ R2 ⎞ VNEG = 1 – 2 . 5 • ⎜ ⎟ ⎝ k 50 ⎠ V V SSP SSP 1V/DIV 2V/DIV V V POS POS 5V/DIV 5V/DIV I I IN IN 100mA/DIV 200mA/DIV 1ms/DIV 3472 FO4a 100µs/DIV 3472 FO4b
Figure 4a. VSSP, VPOS, IIN with 100nF on SSP Figure 4b. VSSP, VPOS, IIN with SSP Open
VSSN VSSN 1V/DIV 2V/DIV VNEG 5V/DIV VNEG 5V/DIV IIN IIN 100mA/DIV 200mA/DIV 500µs/DIV 3472 FO5a 100µs/DIV 3472 FO5b
Figure 5a. VSSN, VNEG, IIN with 100nF on SSN Figure 5b. VSSN, VNEG, IIN with SSN Open
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U U W U APPLICATIO S I FOR ATIO
and larger capacitance, which can cause significant switch- In order to maintain accuracy, high precision resistors are ing losses at 1.1MHz switching frequency. Some recom- preferred (1% is recommended). mended Schottky diodes are listed in Table 4.
Soft-Start Table 4. Recommended Schottky Diodes
The LT3472 has independent soft-start control for each
Forward Forward Diode
channel. As shown in Figure 1, the SSP and SSN pins have
Current Voltage Capacitance Part No. (mA) Drop (V) (pF) Manufacturer
an internal resistor of 50k pulling up to 1.25V, respec- CMDSH-3 100 0.58 @100mA 7 @ 10V Central Semiconductor tively. By connecting a capacitor from the SSP or SSN pin CMDSH2-3 200 0.49 @ 200mA 15 @ 10V (631) 435-1110 to ground, the ramp of each output can be programmed www.centralsemi.com individually. If SSP or SSN is open or pull higher than 1.25V, the corresponding output will ramp up quickly. The
Setting the Output Voltages
waveforms with and without soft-start for the Boost channel are shown in Figure 4. The LT3472 has an accurate feedback resistor of 50k for each channel. Only one resistor is needed to set the output The waveforms with and without soft-start for the negative voltage for each channel. The output voltage can be set channel are shown in Figure 5. according to the following formulas:
Start Sequencing
⎛ R1 ⎞ The LT3472 has internal sequencing circuitry that inhibits VPOS = 1 2 . 5 • ⎜1+ ⎟ ⎝ k 50 ⎠ the negative channel from operating until feedback voltage of the step-up channel reaches about 1.1V, ensuring that ⎛ R2 ⎞ VNEG = 1 – 2 . 5 • ⎜ ⎟ ⎝ k 50 ⎠ V V SSP SSP 1V/DIV 2V/DIV V V POS POS 5V/DIV 5V/DIV I I IN IN 100mA/DIV 200mA/DIV 1ms/DIV 3472 FO4a 100µs/DIV 3472 FO4b
Figure 4a. VSSP, VPOS, IIN with 100nF on SSP Figure 4b. VSSP, VPOS, IIN with SSP Open
VSSN VSSN 1V/DIV 2V/DIV VNEG 5V/DIV VNEG 5V/DIV IIN IIN 100mA/DIV 200mA/DIV 500µs/DIV 3472 FO5a 100µs/DIV 3472 FO5b
Figure 5a. VSSN, VNEG, IIN with 100nF on SSN Figure 5b. VSSN, VNEG, IIN with SSN Open
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