Datasheet LTC3429, LTC3429B (Analog Devices) - 5

ManufacturerAnalog Devices
Description600mA, 500kHz Micropower Synchronous Boost Converter with Output Disconnect
Pages / Page12 / 5 — PI FU CTIO S. SW (Pin 1):. OUT (Pin 5):. GND (Pin 2):. FB (Pin 3):. VIN …
File Format / SizePDF / 204 Kb
Document LanguageEnglish

PI FU CTIO S. SW (Pin 1):. OUT (Pin 5):. GND (Pin 2):. FB (Pin 3):. VIN (Pin 6):. SHDN (Pin 4):. BLOCK DIAGRA

PI FU CTIO S SW (Pin 1): OUT (Pin 5): GND (Pin 2): FB (Pin 3): VIN (Pin 6): SHDN (Pin 4): BLOCK DIAGRA

Model Line for this Datasheet

Text Version of Document

LTC3429/LTC3429B
U U U PI FU CTIO S SW (Pin 1):
Switch Pin. Connect inductor between SW SHDN = Low: Shutdown, quiescent current < 1µA. and VIN. Keep these PCB trace lengths as short and wide Output capacitor can be completely discharged through as possible to reduce EMI and voltage overshoot. If the the load or feedback resistors. A 150Ω resistor is inductor current falls to zero, or SHDN is low, an internal internally connected between SW and VIN. 150Ω antiringing switch is connected from SW to VIN to
V
minimize EMI.
OUT (Pin 5):
Output Voltage Sense Input and Drain of the Internal Synchronous Rectifier MOSFET. Bias is derived
GND (Pin 2):
Signal and Power Ground. Provide a short from VOUT. PCB trace length from VOUT to the output filter direct PCB path between GND and the (–) side of the output capacitor(s) should be as short and wide as possible. VOUT capacitor(s). is completely disconnected from VIN when SHDN is low due to the output disconnect feature.
FB (Pin 3):
Feedback Input to the gm Error Amplifier. Connect resistor divider tap to this pin. The output voltage
VIN (Pin 6):
Battery Input Voltage. The device gets its can be adjusted from 2.5V to 5V by: start-up bias from VIN. Once VOUT exceeds VIN, bias comes from V V OUT. Thus, once started, operation is com- OUT = 1.23V • [1 + (R1/R2)] pletely independent from VIN. Operation is only limited by
SHDN (Pin 4):
Logic Controlled Shutdown Input. the output power level and the battery’s internal series SHDN = High: Normal free running operation, 500kHz resistance. typical operating frequency.
W BLOCK DIAGRA
L1 + 1V TO 4.4V 6 VIN C 1 SW IN + VOUT GOOD VIN – 2.3V START-UP WELL A A/B OSC SWITCH MUX VOUT 0.45 2.5V TO 5V B Ω 5 SYNC PWM DRIVE CONTROL CONTROL 0.35Ω RAMP CPL R1 CURRENT GEN (OPTIONAL) SLOPE Σ SENSE 500kHz COMP PWM COMPARATOR + FB – – 3 COUT g – m ERROR AMP + 1.23V RC REF 80k CP2 Burst Mode 2.5pF SLEEP OPERATION CC R2 CONTROL 150pF SHDN SHUTDOWN 2 GND 4 SHUTDOWN CONTROL 3429 BD 3429fa 5