Datasheet LTC3709 (Analog Devices) - 7
| Manufacturer | Analog Devices |
| Description | Fast 2-Phase, No RSENSE , Synchronous DC/DC Controller with Tracking/Sequencing |
| Pages / Page | 24 / 7 — TYPICAL PERFOR A CE CHARACTERISTICS. Maximum Current Sense. Minimum … |
| File Format / Size | PDF / 329 Kb |
| Document Language | English |
TYPICAL PERFOR A CE CHARACTERISTICS. Maximum Current Sense. Minimum Current Sense. Threshold Voltage vs VRNG
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LTC3709
W U TYPICAL PERFOR A CE CHARACTERISTICS Maximum Current Sense Minimum Current Sense Threshold Voltage vs VRNG Threshold Voltage vs VRNG
350 0 300 –20 250 –40 200 –60 150 –80 100 –100 MAXIMUM CURRENT SENSE THRESHOLD VOLTAGE (mV) MINIMUM CURRENT SENSE THRESHOLD VOLTAGE (mV) 50 –120 0 –140 0.5 0.8 1.1 1.4 1.7 2.0 0.5 0.8 1.1 1.4 1.7 2.0 VRNG (V) VRNG (V) 3709 G19 3709 G20
U U U PI FU CTIO S (QFN/SSOP) RUN/SS (Pin 1/Pin 6):
Run Control and Soft-Start Input.
SGND (Pins 5, 6, 33/Pins 10, 11):
Signal Ground. All A capacitor to ground at this pin sets the ramp rate of the small-signal components such as CSS and compensation output voltage (approximately 0.5s/µF) and the time delay components should connect to this ground and eventually for overcurrent latch-off (see Applications Information). connect to PGND at one point. The Exposed Pad of the QFN Forcing this pin below 1.4V shuts down the device. package must be soldered to PCB ground.
I – TH (Pin 2/Pin 7):
Error Amplifier Compensation Point. The
VOS (Pin 7/Pin 12):
The (–) Input to the Differential current comparator threshold increases with this control Amplifer. voltage. The voltage ranges from 0V to 2.4V with 0.8V
DIFFOUT (Pin 8/Pin 13):
The Output of the Differential corresponding to zero sense voltage (zero current). Amplifier.
VFB (Pin 3/Pin 8):
Error Amplifier Feedback Input. This pin
V + (Pin 9/Pin 14):
The (+) Input to the Differential connects to the error amplifier input. It can be used to
OS
Amplifier. attach additional compensation components if desired.
EXTLPF (Pin 10/Pin 15):
Filter Connection for the PLL.
TRACK (Pin 4/Pin 9):
Tie the TRACK pin to a resistive This PLL is used to synchronize the LTC3709 with an divider connected to the output of another LTC3709 for external clock. either coincident or ratiometric output tracking (see Appli- cations Information). To disable this feature, tie the pin to
INTLPF (Pin 11/Pin 16):
Filter Connection for the PLL. V This PLL is use to phase shift the second channel to the CC. Do Not Float this pin. first channel by 180°. 3709fb 7
W U TYPICAL PERFOR A CE CHARACTERISTICS Maximum Current Sense Minimum Current Sense Threshold Voltage vs VRNG Threshold Voltage vs VRNG
350 0 300 –20 250 –40 200 –60 150 –80 100 –100 MAXIMUM CURRENT SENSE THRESHOLD VOLTAGE (mV) MINIMUM CURRENT SENSE THRESHOLD VOLTAGE (mV) 50 –120 0 –140 0.5 0.8 1.1 1.4 1.7 2.0 0.5 0.8 1.1 1.4 1.7 2.0 VRNG (V) VRNG (V) 3709 G19 3709 G20
U U U PI FU CTIO S (QFN/SSOP) RUN/SS (Pin 1/Pin 6):
Run Control and Soft-Start Input.
SGND (Pins 5, 6, 33/Pins 10, 11):
Signal Ground. All A capacitor to ground at this pin sets the ramp rate of the small-signal components such as CSS and compensation output voltage (approximately 0.5s/µF) and the time delay components should connect to this ground and eventually for overcurrent latch-off (see Applications Information). connect to PGND at one point. The Exposed Pad of the QFN Forcing this pin below 1.4V shuts down the device. package must be soldered to PCB ground.
I – TH (Pin 2/Pin 7):
Error Amplifier Compensation Point. The
VOS (Pin 7/Pin 12):
The (–) Input to the Differential current comparator threshold increases with this control Amplifer. voltage. The voltage ranges from 0V to 2.4V with 0.8V
DIFFOUT (Pin 8/Pin 13):
The Output of the Differential corresponding to zero sense voltage (zero current). Amplifier.
VFB (Pin 3/Pin 8):
Error Amplifier Feedback Input. This pin
V + (Pin 9/Pin 14):
The (+) Input to the Differential connects to the error amplifier input. It can be used to
OS
Amplifier. attach additional compensation components if desired.
EXTLPF (Pin 10/Pin 15):
Filter Connection for the PLL.
TRACK (Pin 4/Pin 9):
Tie the TRACK pin to a resistive This PLL is used to synchronize the LTC3709 with an divider connected to the output of another LTC3709 for external clock. either coincident or ratiometric output tracking (see Appli- cations Information). To disable this feature, tie the pin to
INTLPF (Pin 11/Pin 16):
Filter Connection for the PLL. V This PLL is use to phase shift the second channel to the CC. Do Not Float this pin. first channel by 180°. 3709fb 7
