Datasheet LT3795 (Analog Devices) - 9
| Manufacturer | Analog Devices |
| Description | 110V LED Controller with Spread Spectrum Frequency Modulation |
| Pages / Page | 30 / 9 — PIN FUNCTIONS. ISP (Pin 1):. ISN (Pin 2):. TG (Pin 3):. VC (Pin 8):. GND … |
| File Format / Size | PDF / 848 Kb |
| Document Language | English |
PIN FUNCTIONS. ISP (Pin 1):. ISN (Pin 2):. TG (Pin 3):. VC (Pin 8):. GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29):. CTRL1 (Pin 9):
Model Line for this Datasheet
Text Version of Document
LT3795
PIN FUNCTIONS ISP (Pin 1):
Connection Point for the Positive Terminal supply spike, for example), the GATE pin is pulled low to of the Current Feedback Resistor (RLED). Also serves as turn off the external N-channel MOSFET and the TG pin positive rail for TG pin driver. is driven high to protect the LEDs from an overcurrent
ISN (Pin 2):
Connection Point for the Negative Terminal event. Do not tie this pin to GND as the SHORTLED will of the Current Feedback Resistor (R be asserted and the part will be shut down. LED).
TG (Pin 3):
Top Gate Driver Output. An inverted PWM
VC (Pin 8):
Transconductance Error Amplifier Output Pin. signal drives the gate of a series PMOS device between Used to stabilize the control loop with an RC network. This V pin is high impedance when PWM is low, a feature that ISP and (VISP – 7V) if VISP > 7V. An internal 7V clamp protects the PMOS gate by limiting VGS. Leave TG uncon- stores the demand current state variable for the next PWM nected if not used. high transition. Connect a capacitor between this pin and GND; a resistor in series with the capacitor is recommended
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29):
Ground. for fast transient response. Do not leave this pin open. These pins also serve as current sense input for control loop, sensing the negative terminal of the current sense
CTRL1 (Pin 9):
Current Sense Threshold Adjustment resistor in the source of the N-channel MOSFET. Solder Pin 1. This pin has an identical function as CTRL2. Please the exposed pad directly to the ground plane. refer to the CTRL2 pin description.
ISMON (Pin 5):
ISP/ISN Current Report Pin. The LED
VREF (Pin 10):
Voltage Reference Output Pin. Typically current sensed by ISP/ISN inputs is reported as V 2.015V. This pin drives a resistor divider for the CTRL ISMON = I pins, either for analog dimming or for temperature limit/ LED • RLED • 4. Leave ISMON pin unconnected if not used. When PWM is low, ISMON is driven to ground. Bypass compensation of the LED load. It can supply up to 100μA. with a 47nF capacitor or higher if needed.
SS (Pin 11):
Soft-Start Pin. This pin modulates oscillator
CTRL2 (Pin 6):
Current Sense Threshold Adjustment frequency and compensation pin voltage (VC) clamp. The Pin 2. This pin has identical functions as CTRL1. The soft-start interval is set with an external capacitor. The pin V has a 28μA (typical) pull-up current source to an internal (ISP-ISN) threshold is regulated by the internal 1.1V refer- ence voltage, CTRL1 or CTRL2. Whichever is the lowest 2.5V rail. This pin can be used as fault timer. Provided the takes precedence. Regulating threshold V SS pin has exceeded 1.7V to complete a blanking period (ISP-ISN) is 0.25 • V at start-up, the pull-up current source is disabled and a CTRLX less an offset for 0.1V < VCTRLX < 1V. For VCTRLX > 1.2V the current sense threshold is constant at the full-scale 2.8µA pull-down current enabled when any one of the value of 250mV. For 1V < V following fault conditions happen: CTRLX < 1.2V, the dependence of the current sense threshold upon V 1. LED overcurrent (ISP-ISN > 0.375V) CTRLX transitions from a linear function to a constant value, reaching 98% 2. INTVCC undervoltage of full-scale value by VCTRLX = 1.1V. Connect CTRL1 and 3. Output short (FB < 0.3V after start-up) CTRL2 to VREF for the 250mV default current threshold. 4. Thermal limit Do not leave this pin open. Connect either CTRL pin to GND for zero LED current. The SS pin must be discharged below 0.2V to reinitiate a soft-start cycle. Switching is disabled until SS begins to
FB (Pin 7):
Voltage Loop Feedback Pin. FB is intended for recharge. It is important to select a capacitor large enough constant-voltage regulation or for LED protection/open that FB can exceed 0.3V under normal load conditions LED detection. The internal transconductance amplifier before SS exceeds 1.7V. Do not leave this pin open. with output VC regulates FB to 1.25V (nominal) through the DC/DC converter. If the FB input is regulating the loop,
RT (Pin 12):
Switching Frequency Adjustment Pin. Set the and V(ISP-ISN) is less than 25mV (typical), the OPENLED frequency using a resistor to GND (for resistor values, see pull-down is asserted. This action may signal an open LED the Typical Performance curve or Table 2). Do not leave fault. If FB is driven above the 1.3V (by an external power the RT pin open. 3795fc For more information www.linear.com/LT3795 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
PIN FUNCTIONS ISP (Pin 1):
Connection Point for the Positive Terminal supply spike, for example), the GATE pin is pulled low to of the Current Feedback Resistor (RLED). Also serves as turn off the external N-channel MOSFET and the TG pin positive rail for TG pin driver. is driven high to protect the LEDs from an overcurrent
ISN (Pin 2):
Connection Point for the Negative Terminal event. Do not tie this pin to GND as the SHORTLED will of the Current Feedback Resistor (R be asserted and the part will be shut down. LED).
TG (Pin 3):
Top Gate Driver Output. An inverted PWM
VC (Pin 8):
Transconductance Error Amplifier Output Pin. signal drives the gate of a series PMOS device between Used to stabilize the control loop with an RC network. This V pin is high impedance when PWM is low, a feature that ISP and (VISP – 7V) if VISP > 7V. An internal 7V clamp protects the PMOS gate by limiting VGS. Leave TG uncon- stores the demand current state variable for the next PWM nected if not used. high transition. Connect a capacitor between this pin and GND; a resistor in series with the capacitor is recommended
GND (Pins 4, 17, 21, 22, Exposed Pad Pin 29):
Ground. for fast transient response. Do not leave this pin open. These pins also serve as current sense input for control loop, sensing the negative terminal of the current sense
CTRL1 (Pin 9):
Current Sense Threshold Adjustment resistor in the source of the N-channel MOSFET. Solder Pin 1. This pin has an identical function as CTRL2. Please the exposed pad directly to the ground plane. refer to the CTRL2 pin description.
ISMON (Pin 5):
ISP/ISN Current Report Pin. The LED
VREF (Pin 10):
Voltage Reference Output Pin. Typically current sensed by ISP/ISN inputs is reported as V 2.015V. This pin drives a resistor divider for the CTRL ISMON = I pins, either for analog dimming or for temperature limit/ LED • RLED • 4. Leave ISMON pin unconnected if not used. When PWM is low, ISMON is driven to ground. Bypass compensation of the LED load. It can supply up to 100μA. with a 47nF capacitor or higher if needed.
SS (Pin 11):
Soft-Start Pin. This pin modulates oscillator
CTRL2 (Pin 6):
Current Sense Threshold Adjustment frequency and compensation pin voltage (VC) clamp. The Pin 2. This pin has identical functions as CTRL1. The soft-start interval is set with an external capacitor. The pin V has a 28μA (typical) pull-up current source to an internal (ISP-ISN) threshold is regulated by the internal 1.1V refer- ence voltage, CTRL1 or CTRL2. Whichever is the lowest 2.5V rail. This pin can be used as fault timer. Provided the takes precedence. Regulating threshold V SS pin has exceeded 1.7V to complete a blanking period (ISP-ISN) is 0.25 • V at start-up, the pull-up current source is disabled and a CTRLX less an offset for 0.1V < VCTRLX < 1V. For VCTRLX > 1.2V the current sense threshold is constant at the full-scale 2.8µA pull-down current enabled when any one of the value of 250mV. For 1V < V following fault conditions happen: CTRLX < 1.2V, the dependence of the current sense threshold upon V 1. LED overcurrent (ISP-ISN > 0.375V) CTRLX transitions from a linear function to a constant value, reaching 98% 2. INTVCC undervoltage of full-scale value by VCTRLX = 1.1V. Connect CTRL1 and 3. Output short (FB < 0.3V after start-up) CTRL2 to VREF for the 250mV default current threshold. 4. Thermal limit Do not leave this pin open. Connect either CTRL pin to GND for zero LED current. The SS pin must be discharged below 0.2V to reinitiate a soft-start cycle. Switching is disabled until SS begins to
FB (Pin 7):
Voltage Loop Feedback Pin. FB is intended for recharge. It is important to select a capacitor large enough constant-voltage regulation or for LED protection/open that FB can exceed 0.3V under normal load conditions LED detection. The internal transconductance amplifier before SS exceeds 1.7V. Do not leave this pin open. with output VC regulates FB to 1.25V (nominal) through the DC/DC converter. If the FB input is regulating the loop,
RT (Pin 12):
Switching Frequency Adjustment Pin. Set the and V(ISP-ISN) is less than 25mV (typical), the OPENLED frequency using a resistor to GND (for resistor values, see pull-down is asserted. This action may signal an open LED the Typical Performance curve or Table 2). Do not leave fault. If FB is driven above the 1.3V (by an external power the RT pin open. 3795fc For more information www.linear.com/LT3795 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Typical Application Related Parts
