Datasheet AD7091R-5 (Analog Devices) - 9

AD7091R-5 Data Sheet Pin No. TSSOP LFCSP Mnemonic Description
16 14 AS1 I2C Address Bit 1. Together with AS0, the logic state of these two inputs selects a unique I2C address for the AD7091R-5. The device address depends on the logic state of these pins. 17 15 SDA Serial Data Input/Output. This open-drain output requires a pull-up resistor. The output coding is straight binary for the voltage channels. 18 16 SCL Digital Input Serial I2C Bus Clock. This input requires a pul -up resistor. The data transfer rate in I2C mode is compatible with both 100 kHz (standard mode) and 400 kHz (fast mode) operating modes. 19 17 CONVST/GPO1 This is a multifunction pin determined by the configuration register and mode of conversion. Convert Start Input Signal (CONVST). Edge triggered logic input. The falling edge of CONVST places the ADC into hold mode and initiates a conversion. The logic level of CONVST at EOC controls the power modes of the AD7091R-5. General-Purpose Digital Output 1 (GPO1). When in command or autocycle mode, this pin can function as a general-purpose digital output. 20 18 VDRIVE Logic Power Supply Input. The voltage supplied at this pin determines at what voltage the interface operates. Connect decoupling capacitors between VDRIVE and GND. The typical recommended values are 10 µF and 0.1 µF. The voltage range on this pin is 1.8 V to 5.25 V and may differ from the voltage range at VDD, but must never exceed it by more than 0.3 V. N/A1 21 EPAD Exposed Pad. The exposed pad is not connected internally. It is recommended that the pad be soldered to GND. 1 N/A means not applicable. Rev. 0 | Page 8 of 34 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION CONVERTER OPERATION ADC TRANSFER FUNCTION REFERENCE POWER SUPPLY DEVICE RESET ANALOG INPUT DRIVER AMPLIFIER CHOICE TYPICAL CONNECTION DIAGRAM I2C REGISTERS ADDRESSING REGISTERS SLAVE ADDRESS I2C REGISTER ACCESS CONVERSION RESULT REGISTER CHANNEL REGISTER CONFIGURATION REGISTER ALERT INDICATION REGISTER CHANNEL x LOW LIMIT REGISTER CHANNEL x HIGH LIMIT REGISTER CHANNEL x HYSTERESIS REGISTER I2C INTERFACE SERIAL BUS ADDRESS BYTE GENERAL I2C TIMING WRITING TO THE AD7091R-5 WRITING TWO BYTES OF DATA TO A 16-BIT REGISTER WRITING TO MULTIPLE REGISTERS READING DATA FROM THE AD7091R-5 READING TWO BYTES OF DATA FROM A 16-BIT REGISTER MODES OF OPERATION SAMPLE MODE COMMAND MODE AUTOCYCLE MODE POWER-DOWN MODE ALERT BUSY CHANNEL SEQUENCER OUTLINE DIMENSIONS ORDERING GUIDE