Datasheet AD7262 (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators |
| Pages / Page | 33 / 3 — AD7262. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 11/2016—Rev. A … |
| Revision | C |
| File Format / Size | PDF / 896 Kb |
| Document Language | English |
AD7262. Data Sheet. TABLE OF CONTENTS. REVISION HISTORY. 11/2016—Rev. A to Rev. B. 7/2008—Revision 0: Initial Version
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AD7262 Data Sheet TABLE OF CONTENTS
Features .. 1 Application Details ... 20 General Description ... 1 Modes of Operation ... 22 Functional Block Diagram .. 1 Pin-Driven Mode ... 22 Product Highlights ... 1 Gain Selection ... 22 Revision History ... 2 Power-Down Modes .. 22 Specifications ... 3 Control Register ... 23 Timing Specifications .. 6 On-Chip Registers .. 24 Timing Diagram ... 6 Serial Interface .. 25 Absolute Maximum Ratings .. 7 Calibration ... 27 ESD Caution .. 7 Internal Offset Calibration .. 27 Pin Configurations and Function Descriptions ... 8 Adjusting the Offset Calibration Registers ... 28 Typical Performance Characteristics ... 10 System Gain Calibration.. 28 Terminology .. 14 Microprocessor Interfacing ... 29 Theory of Operation .. 15 AD7262/AD7262-5 to ADSP-BF531 ... 29 Circuit Information .. 15 Application Hints ... 30 Comparators .. 15 Grounding and Layout .. 30 Operation ... 15 PCB Design Guidelines for LFCSP .. 30 Analog Inputs .. 15 Outline Dimensions ... 31 VDRIVE .. 16 Ordering Guide .. 31 Reference ... 17 Typical Connection Diagrams .. 17
REVISION HISTORY 11/2016—Rev. A to Rev. B
Changes to Table 4 ... 9 Change to Figure 4 ... 8 Change to Serial Interface Section ... 25 Change to Pin 31, 32 Description, Table 4 .. 9 Changes to Figure 34 and Figure 34 Caption ... 26 Changes to Serial Interface Section .. 25 Change to Microprocessor Interfacing Section and Figure 37 . 29 Changes to Figure 34 and Figure 34 Caption ... 26 Changes to AD7262/AD7262-5 to ADSP-BF531 Section ... 29 Updated Outline Dimensions ... 31 Updated Outline Dimensions ... 31 Changes to Ordering Guide .. 31
7/2008—Revision 0: Initial Version 8/2015—Rev. 0 to Rev. A
Changed ADSP-BF53x to ADSP-BF531 ... Throughout Rev. B | Page 2 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION COMPARATORS OPERATION ANALOG INPUTS Transfer Function VDRIVE REFERENCE TYPICAL CONNECTION DIAGRAMS Comparator Application Details APPLICATION DETAILS MODES OF OPERATION PIN-DRIVEN MODE GAIN SELECTION POWER-DOWN MODES Power-Up Conditions CONTROL REGISTER ON-CHIP REGISTERS Addressing the On-Chip Registers Writing to a Register Reading from a Register SERIAL INTERFACE CALIBRATION INTERNAL OFFSET CALIBRATION ADJUSTING THE OFFSET CALIBRATION REGISTERS SYSTEM GAIN CALIBRATION MICROPROCESSOR INTERFACING AD7262/AD7262-5 TO ADSP-BF531 APPLICATION HINTS GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR LFCSP OUTLINE DIMENSIONS ORDERING GUIDE
AD7262 Data Sheet TABLE OF CONTENTS
Features .. 1 Application Details ... 20 General Description ... 1 Modes of Operation ... 22 Functional Block Diagram .. 1 Pin-Driven Mode ... 22 Product Highlights ... 1 Gain Selection ... 22 Revision History ... 2 Power-Down Modes .. 22 Specifications ... 3 Control Register ... 23 Timing Specifications .. 6 On-Chip Registers .. 24 Timing Diagram ... 6 Serial Interface .. 25 Absolute Maximum Ratings .. 7 Calibration ... 27 ESD Caution .. 7 Internal Offset Calibration .. 27 Pin Configurations and Function Descriptions ... 8 Adjusting the Offset Calibration Registers ... 28 Typical Performance Characteristics ... 10 System Gain Calibration.. 28 Terminology .. 14 Microprocessor Interfacing ... 29 Theory of Operation .. 15 AD7262/AD7262-5 to ADSP-BF531 ... 29 Circuit Information .. 15 Application Hints ... 30 Comparators .. 15 Grounding and Layout .. 30 Operation ... 15 PCB Design Guidelines for LFCSP .. 30 Analog Inputs .. 15 Outline Dimensions ... 31 VDRIVE .. 16 Ordering Guide .. 31 Reference ... 17 Typical Connection Diagrams .. 17
REVISION HISTORY 11/2016—Rev. A to Rev. B
Changes to Table 4 ... 9 Change to Figure 4 ... 8 Change to Serial Interface Section ... 25 Change to Pin 31, 32 Description, Table 4 .. 9 Changes to Figure 34 and Figure 34 Caption ... 26 Changes to Serial Interface Section .. 25 Change to Microprocessor Interfacing Section and Figure 37 . 29 Changes to Figure 34 and Figure 34 Caption ... 26 Changes to AD7262/AD7262-5 to ADSP-BF531 Section ... 29 Updated Outline Dimensions ... 31 Updated Outline Dimensions ... 31 Changes to Ordering Guide .. 31
7/2008—Revision 0: Initial Version 8/2015—Rev. 0 to Rev. A
Changed ADSP-BF53x to ADSP-BF531 ... Throughout Rev. B | Page 2 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION COMPARATORS OPERATION ANALOG INPUTS Transfer Function VDRIVE REFERENCE TYPICAL CONNECTION DIAGRAMS Comparator Application Details APPLICATION DETAILS MODES OF OPERATION PIN-DRIVEN MODE GAIN SELECTION POWER-DOWN MODES Power-Up Conditions CONTROL REGISTER ON-CHIP REGISTERS Addressing the On-Chip Registers Writing to a Register Reading from a Register SERIAL INTERFACE CALIBRATION INTERNAL OFFSET CALIBRATION ADJUSTING THE OFFSET CALIBRATION REGISTERS SYSTEM GAIN CALIBRATION MICROPROCESSOR INTERFACING AD7262/AD7262-5 TO ADSP-BF531 APPLICATION HINTS GROUNDING AND LAYOUT PCB DESIGN GUIDELINES FOR LFCSP OUTLINE DIMENSIONS ORDERING GUIDE
