Datasheet AD9444 (Analog Devices)

14-Bit, 80 MSPS, A/D Converter AD9444 FEATURES FUNCTIONAL BLOCK DIAGRAM 80 MSPS guaranteed sampling rate AGND AVDD1 AVDD2 DRGND DRVDD 100 dB two-tone SFDR with 69.3 MHz and 70.3 MHz AD9444 DFS 73.1 dB SNR with 70 MHz input DCS MODE 97 dBc SFDR with 70 MHz input BUFFER OUTPUT MODE VIN+ 14 2 T/H PIPELINE CMOS Excellent linearity OR VIN– ADC OR 28 DNL = ±0.4 LSB typical LVDS OUTPUT D13–D0 INL = ±0.6 LSB typical STAGING 2 CLK+ CLOCK 1.2 W power dissipation DCO AND TIMING CLK– REF 3.3 V and 5 V supply operation MANAGEMENT 2.0 V p-p differential full-scale input
05089-001
LVDS outputs (ANSI-644 compatible) VREF SENSE REFT REFB Data format select
Figure 1.
Output clock available
Optional features allow users to implement various selectable
APPLICATIONS
operating conditions, including data format select and output data mode.
Multicarrier, multimode cellular receivers Antenna array positioning
The AD9444 is available in a 100-lead surface-mount plastic
Power amplifier linearization
package (100-lead TQFP/EP) specified over the industrial
Broadband wireless
temperature range (−40°C to +85°C).
Radar, infared imaging PRODUCT HIGHLIGHTS Communications instrumentation
1. High performance: Outstanding SFDR performance for mul-
GENERAL DESCRIPTION
ticarrier, multimode 3G and 4G cellular base station receivers. The AD9444 is a 14-bit monolithic, sampling analog-to-digital converter (ADC) with an on-chip, track-and-hold circuit and is 2. Ease of use: On-chip reference and track-and-hold. An optimized for power, small size, and ease of use. The product output clock simplifies data capture. operates at up to an 80 MSPS conversion rate and is optimized 3. Packaged in a Pb-free, 100-lead TQFP/EP. for multicarrier, multimode receivers, such as those found in cellular infrastructure equipment. 4. Clock DCS maintains overall ADC performance over a wide range of clock pulse widths. The ADC requires 3.3 V and 5.0 V power supplies and a low voltage differential input clock for full performance operation. 5. OR (out-of-range) outputs indicate when the signal is beyond No external reference or driver components are required for the selected input range. many applications. Data outputs are LVDS-compatible (ANSI- 644) or CMOS-compatible and include the means to reduce the overall current needed for short trace distances.
Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. or otherwise under any patent or patent rights of Analog Devices. Trademarks and Tel: 781.329.4700 www.analog.com registered trademarks are the property of their respective owners. Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS DC SPECIFICATIONS AC SPECIFICATIONS DIGITAL SPECIFICATIONS SWITCHING SPECIFICATIONS EXPLANATION OF TEST LEVELS ABSOLUTE MAXIMUM RATINGS Thermal Resistance ESD CAUTION DEFINITIONS OF SPECIFICATIONS PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS EQUIVALENT CIRCUITS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ANALOG INPUT AND REFERENCE OVERVIEW Internal Reference Connection Internal Reference Trim External Reference Operation Analog Inputs CLOCK INPUT CONSIDERATIONS Jitter Considerations POWER CONSIDERATIONS DIGITAL OUTPUTS LVDS Mode CMOS Mode TIMING OPERATIONAL MODE SELECTION Data Format Select Output Mode Select Duty Cycle Stabilizer EVALUATION BOARD LVDS EVALUATION BOARD SCHEMATICS LVDS MODE EVALUATION BOARD BILL OF MATERIALS (BOM) CMOS EVALUATION BOARD SCHEMATICS CMOS MODE EVALUATION BOARD BILL OF MATERIALS (BOM) OUTLINE DIMENSIONS ORDERING GUIDE