Datasheet AD9216 (Analog Devices) - 6
| Manufacturer | Analog Devices |
| Description | 10-Bit, 65/80/105 MSPS Dual A/D Converter |
| Pages / Page | 41 / 6 — LOGIC SPECIFICATIONS. Table 3. AD9216BCPZ-65. AD9216BCPZ-80. … |
| Revision | A |
| File Format / Size | PDF / 1.6 Mb |
| Document Language | English |
LOGIC SPECIFICATIONS. Table 3. AD9216BCPZ-65. AD9216BCPZ-80. AD9216BCPZ-105. Parameter. Temp. Test. Min. Typ. Max. Unit. Level
Model Line for this Datasheet
Text Version of Document
link to page 6 AD9216
LOGIC SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; AIN = −0.5 dBFS differential input, 1.0 V internal reference, TMIN to TMAX, DCS enabled, unless otherwise noted.
Table 3. AD9216BCPZ-65 AD9216BCPZ-80 AD9216BCPZ-105 Parameter Temp Test Min Typ Max Min Typ Max Min Typ Max Unit Level
LOGIC INPUTS High Level Input Full IV 2.0 2.0 2.0 V Voltage Low Level Input Full IV 0.8 0.8 0.8 V Voltage High Level Input Full IV −10 +10 −10 +10 −10 +10 µA Current Low Level Input Full IV −10 +10 −10 +10 −10 +10 µA Current Input Capacitance Full IV 2 2 2 pF LOGIC OUTPUTS1 DRVDD = 2.5 V High Level Output Full IV 2.45 2.45 2.45 V Voltage Low Level Output Full IV 0.05 0.05 0.05 V Voltage 1 Output voltage levels measured with 5 pF load on each output. Rev. A | Page 5 of 40 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS LOGIC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS OUTPUT CODING TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation Shared Reference Mode DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
LOGIC SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; AIN = −0.5 dBFS differential input, 1.0 V internal reference, TMIN to TMAX, DCS enabled, unless otherwise noted.
Table 3. AD9216BCPZ-65 AD9216BCPZ-80 AD9216BCPZ-105 Parameter Temp Test Min Typ Max Min Typ Max Min Typ Max Unit Level
LOGIC INPUTS High Level Input Full IV 2.0 2.0 2.0 V Voltage Low Level Input Full IV 0.8 0.8 0.8 V Voltage High Level Input Full IV −10 +10 −10 +10 −10 +10 µA Current Low Level Input Full IV −10 +10 −10 +10 −10 +10 µA Current Input Capacitance Full IV 2 2 2 pF LOGIC OUTPUTS1 DRVDD = 2.5 V High Level Output Full IV 2.45 2.45 2.45 V Voltage Low Level Output Full IV 0.05 0.05 0.05 V Voltage 1 Output voltage levels measured with 5 pF load on each output. Rev. A | Page 5 of 40 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK GENERAL DESCRIPTION PRODUCT HIGHLIGHTS SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS LOGIC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS EQUIVALENT CIRCUITS THEORY OF OPERATION ANALOG INPUT Differential Input Configurations Single-Ended Input Configuration CLOCK INPUT AND CONSIDERATIONS POWER DISSIPATION AND STANDBY MODE DIGITAL OUTPUTS OUTPUT CODING TIMING DATA FORMAT VOLTAGE REFERENCE Internal Reference Connection External Reference Operation Shared Reference Mode DUAL ADC LFCSP PCB POWER CONNECTOR ANALOG INPUTS OPTIONAL OPERATIONAL AMPLIFIER CLOCK VOLTAGE REFERENCE DATA OUTPUTS LFCSP EVALUATION BOARD BILL OF MATERIALS (BOM) LFCSP PCB SCHEMATICS LFCSP PCB LAYERS THERMAL CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
