Datasheet AD7997, AD7998 (Analog Devices) - 10

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AD7997/AD7998 PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS AGND 1 20 AGND V 2 DD AD7997/ 19 SCL AGND 3 AD7998 18 SDA AGND 4 TOP VIEW 17 ALERT/BUSY VDD 5 (Not to Scale) 16 CONVST REFIN 6 15 AS VIN1 7 14 VIN2 VIN3 8 13 VIN4 VIN5 9 12 VIN6 VIN7 10 11 VIN8
03473-0-003 Figure 3. AD7998/AD7997 Pin Configuration
Table 5. Pin Function Descriptions Pin No. Mnemonic Function
1, 3, AGND Analog Ground. Ground reference point for all circuitry on the AD7997/AD7998. All analog input signals should be 4, 20 referred to this AGND voltage. 2, 5 VDD Power Supply Input. The VDD range for the AD7997/AD7998 is from 2.7 V to 5.5 V. 6 REFIN Voltage Reference Input. The external reference for the AD7997/AD7998 should be applied to this input pin. The voltage range for the external reference is 1.2 V to VDD. A 0.1 µF and 1 µF capacitors should be placed between REFIN and AGND. See Typical Connection Diagram. 7 VIN1 Analog Input 1. Single-ended analog input channel. The input range is 0 V to REFIN. 8 VIN3 Analog Input 3. Single-ended analog input channel. The input range is 0 V to REFIN. 9 VIN5 Analog Input 5. Single-ended analog input channel. The input range is 0 V to REFIN. 10 VIN7 Analog Input 7. Single-ended analog input channel. The input range is 0 V to REFIN. 11 VIN8 Analog Input 8. Single-ended analog input channel. The input range is 0 V to REFIN. 12 VIN6 Analog Input 6. Single-ended analog input channel. The input range is 0 V to REFIN. 13 VIN4 Analog Input 4. Single-ended analog input channel. The input range is 0 V to REFIN. 14 VIN2 Analog Input 2. Single-ended analog input channel. The input range is 0 V to REFIN. 15 AS Logic Input. Address select input that selects one of three I2C addresses for the AD7997/AD7998, as shown in Table 6. The device address depends on the voltage applied to this pin. 16 CONVST Logic Input Signal. Convert start signal. This is an edge-triggered logic input. The rising edge of this signal powers up the part. The power-up time for the part is 1 µs. The falling edge of CONVST places the track/hold into hold mode and initiates a conversion. A power-up time of at least 1 µs must be allowed for the CONVST high pulse; otherwise, the conversion result is invalid (see the Modes of Operation section). 17 ALERT/BUSY Digital Output. Selectable as an ALERT or BUSY output function. When configured as an ALERT, this pin acts as an out- of-range indicator and, if enabled, becomes active when the conversion result violates the DATAHIGH or DATALOW register values. See the Limit Registers section. When configured as a BUSY output, this pin becomes active when a conversion is in progress. Open-drain output. 18 SDA Digital I/O. Serial bus bidirectional data. Open-drain output. External pull-up resistor required. 19 SCL Digital Input. Serial bus clock. Open-drain input. External pull-up resistor required.
Table 6. I2C Address Selection Part Number AS Pin I2C Address
AD7997-0 AGND 010 0001 AD7997-0 VDD 010 0010 AD7997-1 AGND 010 0011 AD7997-1 VDD 010 0100 AD7997-x1 Float 010 0000 AD7998-0 AGND 010 0001 AD7998-0 VDD 010 0010 AD7998-1 AGND 010 0011 AD7998-1 VDD 010 0100 AD7998-x1 Float 010 0000 1 If the AS pin is left floating on any of the AD7997/AD7998 parts, the device address is 010 0000. Rev. 0 | Page 10 of 32 Document Outline FEATURES GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS AD7997 SPECIFICATIONS AD7998 SPECIFICATIONS I2C TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS CIRCUIT INFORMATION CONVERTER OPERATION TYPICAL CONNECTION DIAGRAM ANALOG INPUT INTERNAL REGISTER STRUCTURE ADDRESS POINTER REGISTER CONFIGURATION REGISTER CONVERSION RESULT REGISTER LIMIT REGISTERS DATAHIGH Register CH1/CH2/CH3/CH4 DATALOW Register CH1/CH2/CH3/CH4 Hysteresis Register (CH1/CH2/CH3/CH4) Using the Limit Registers to Store Min/Max Conversion Result ALERT STATUS REGISTER (CH1 TO CH4) CYCLE TIMER REGISTER SAMPLE DELAY AND BIT TRIAL DELAY SERIAL INTERFACE SERIAL BUS ADDRESS WRITING TO THE AD7997/AD7998 WRITING TO THE ADDRESS POINTER REGISTER FOR A SUBSEQUENT REA WRITING A SINGLE BYTE OF DATA TO THE ALERT STATUS REGISTER O WRITING TWO BYTES OF DATA TO A LIMIT, HYSTERESIS, OR CONFIGU READING DATA FROM THE AD7997/AD7998 ALERT/BUSY PIN SMBus ALERT BUSY PLACING THE AD7997-1/AD7998-1 INTOHIGH SPEED MODE THE ADDRESS SELECT (AS) PIN MODES OF OPERATION MODE 1—USING THE PIN MODE 2 – COMMAND MODE MODE 3—AUTOMATIC CYCLE INTERVAL MODE OUTLINE DIMENSIONS ORDERING GUIDE RELATED PARTS IN I2C-COMPATIBLE ADC PRODUCT FAMILY