Datasheet AD7654 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | Dual, 2-Channel, Simultaneous Sampling, PulSAR , 500 kSPS, 16-Bit ADC |
| Pages / Page | 28 / 8 — Data Sheet. AD7654. ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Values. … |
| Revision | D |
| File Format / Size | PDF / 478 Kb |
| Document Language | English |
Data Sheet. AD7654. ABSOLUTE MAXIMUM RATINGS Table 5. Parameter Values. 1.6mA. IOL. TO OUTPUT. 1.4V. PIN. 60pF*. 500µA. IOH
Model Line for this Datasheet
Text Version of Document
link to page 17
Data Sheet AD7654 ABSOLUTE MAXIMUM RATINGS Table 5.
Stresses at or above those listed under Absolute Maximum
Parameter Values
Ratings may cause permanent damage to the product. This is a Analog Inputs stress rating only; functional operation of the product at these INAx1, INBx1, REFx, INxN, AVDD + 0.3 V to or any other conditions above those indicated in the operational REFGND AGND − 0.3 V section of this specification is not implied. Operation beyond Ground Voltage Differences the maximum operating conditions for extended periods may AGND, DGND, OGND ±0.3 V affect product reliability. Supply Voltages
1.6mA IOL
AVDD, DVDD, OVDD −0.3 V to +7 V AVDD to DVDD, AVDD to OVDD ±7 V DVDD to OVDD −0.3 V to +7 V
TO OUTPUT 1.4V PIN C
Digital Inputs −0.3 V to DVDD + 0.3 V
L 60pF*
Internal Power Dissipation2 700 mW Internal Power Dissipation3 2.5 W
500µA IOH
Junction Temperature 150°C
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
2
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
00 Storage Temperature Range −65°C to +150°C 7-
CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
05 03 Lead Temperature Range Figure 2. Load Circuit for Digital Interface Timing (Soldering 10 sec) 300°C (SDOUT, SYNC, SCLK Outputs, CL = 10 pF) 1 See the Analog Inputs section.
2V
2 Specification is for device in free air:
0.8V
48-lead LQFP: θJA = 91°C/W, θJC = 30°C/W.
tDELAY tDELAY
3 Specification is for device in free air: 48-lead LFCSP; θJA = 26°C/W.
2V 2V
03 0
0.8V 0.8V
3057- 0 Figure 3. Voltage Reference Levels for Timing
ESD CAUTION
Rev. D | Page 7 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION CIRCUIT INFORMATION MODES OF OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS INPUT CHANNEL MULTIPLEXER DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) Channel A//B Output SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Convert External Clock Data Read Previous During Convert MICROPROCESSOR INTERFACING SPI INTERFACE (ADSP-2191M) APPLICATION HINTS LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD7654 ABSOLUTE MAXIMUM RATINGS Table 5.
Stresses at or above those listed under Absolute Maximum
Parameter Values
Ratings may cause permanent damage to the product. This is a Analog Inputs stress rating only; functional operation of the product at these INAx1, INBx1, REFx, INxN, AVDD + 0.3 V to or any other conditions above those indicated in the operational REFGND AGND − 0.3 V section of this specification is not implied. Operation beyond Ground Voltage Differences the maximum operating conditions for extended periods may AGND, DGND, OGND ±0.3 V affect product reliability. Supply Voltages
1.6mA IOL
AVDD, DVDD, OVDD −0.3 V to +7 V AVDD to DVDD, AVDD to OVDD ±7 V DVDD to OVDD −0.3 V to +7 V
TO OUTPUT 1.4V PIN C
Digital Inputs −0.3 V to DVDD + 0.3 V
L 60pF*
Internal Power Dissipation2 700 mW Internal Power Dissipation3 2.5 W
500µA IOH
Junction Temperature 150°C
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
2
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
00 Storage Temperature Range −65°C to +150°C 7-
CL OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
05 03 Lead Temperature Range Figure 2. Load Circuit for Digital Interface Timing (Soldering 10 sec) 300°C (SDOUT, SYNC, SCLK Outputs, CL = 10 pF) 1 See the Analog Inputs section.
2V
2 Specification is for device in free air:
0.8V
48-lead LQFP: θJA = 91°C/W, θJC = 30°C/W.
tDELAY tDELAY
3 Specification is for device in free air: 48-lead LFCSP; θJA = 26°C/W.
2V 2V
03 0
0.8V 0.8V
3057- 0 Figure 3. Voltage Reference Levels for Timing
ESD CAUTION
Rev. D | Page 7 of 27 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS TIMING SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION CIRCUIT INFORMATION MODES OF OPERATION TRANSFER FUNCTIONS TYPICAL CONNECTION DIAGRAM ANALOG INPUTS INPUT CHANNEL MULTIPLEXER DRIVER AMPLIFIER CHOICE VOLTAGE REFERENCE INPUT POWER SUPPLY POWER DISSIPATION CONVERSION CONTROL DIGITAL INTERFACE PARALLEL INTERFACE Master Parallel Interface Slave Parallel Interface 8-Bit Interface (Master or Slave) Channel A//B Output SERIAL INTERFACE MASTER SERIAL INTERFACE Internal Clock SLAVE SERIAL INTERFACE External Clock External Discontinuous Clock Data Read After Convert External Clock Data Read Previous During Convert MICROPROCESSOR INTERFACING SPI INTERFACE (ADSP-2191M) APPLICATION HINTS LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE
