Datasheet AD7476A, AD7477A, AD7478A (Analog Devices) - 3
| Manufacturer | Analog Devices |
| Description | 8-Bit, 1 MSPS, Low-Power A/D Converter in SC70 and MSOP Packages |
| Pages / Page | 28 / 3 — Data Sheet. AD7476A/AD7477A/AD7478A. SPECIFICATIONS AD7476A. … |
| Revision | G |
| File Format / Size | PDF / 548 Kb |
| Document Language | English |
Data Sheet. AD7476A/AD7477A/AD7478A. SPECIFICATIONS AD7476A. SPECIFICATIONS. Table 1. Parameter. A Grade2. B Grade2. Y Grade2. Unit
Model Line for this Datasheet
- AD7476AAKSZ-500RL7 AD7476AAKSZ-REEL7 AD7476ABKSZ-500RL7 AD7476ABKSZ-REEL7 AD7476ABRMZ AD7476ABRMZ-REEL AD7476ABRMZ-REEL7 AD7476AWYRMZ AD7476AWYRMZ-RL7 AD7476AYKSZ-500RL7 AD7476AYKSZ-REEL7 AD7476AYRMZ AD7476AYRMZ-REEL7
Text Version of Document
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Data Sheet AD7476A/AD7477A/AD7478A SPECIFICATIONS AD7476A SPECIFICATIONS
VDD = 2.35 V to 5.25 V, fSCLK = 20 MHz, fSAMPLE = 1 MSPS, TA = TMIN to TMAX, unless otherwise noted.1
Table 1. Parameter A Grade2 B Grade2 Y Grade2 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-Noise-and-Distortion (SINAD)3 70 70 70 dB min VDD = 2.35 V to 3.6 V, TA = 25°C 69 69 69 dB min VDD = 2.4 V to 3.6 V 71.5 71.5 71.5 dB typ VDD = 2.35 V to 3.6 V 69 69 69 dB min VDD = 4.75 V to 5.25 V, TA = 25°C 68 68 68 dB min VDD = 4.75 V to 5.25 V Signal-to-Noise Ratio (SNR)3 71 71 71 dB min VDD = 2.35 V to 3.6 V, TA = 25°C 70 70 70 dB min VDD = 2.4 V to 3.6 V 70 70 70 dB min VDD = 4.75 V to 5.25 V, TA = 25°C 69 69 69 dB min VDD = 4.75 V to 5.25 V Total Harmonic Distortion (THD)3 –80 –80 –80 dB typ Peak Harmonic or Spurious Noise (SFDR)3 –82 –82 –82 dB typ Intermodulation Distortion (IMD)3 Second-Order Terms –84 –84 –84 dB typ fa = 100.73 kHz, fb = 90.72 kHz Third-Order Terms –84 –84 –84 dB typ fa = 100.73 kHz, fb = 90.72 kHz Aperture Delay 10 10 10 ns typ Aperture Jitter 30 30 30 ps typ Full Power Bandwidth 13.5 13.5 13.5 MHz typ At 3 dB 2 2 2 MHz typ At 0.1 dB DC ACCURACY B and Y grades4 Resolution 12 12 12 Bits Integral Nonlinearity3 ±1.5 ±1.5 LSB max ±0.75 LSB typ Differential Nonlinearity –0.9/+1.5 –0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits ±0.75 LSB typ Offset Error3, 5 ±1.5 ±1.5 LSB max ±1.5 ±0.2 ±0.2 LSB typ Gain Error3, 5 ±1.5 ±1.5 LSB max ±1.5 ±0.5 ±0.5 LSB typ Total Unadjusted Error (TUE)3, 5 ±2 ±2 LSB max ANALOG INPUT Input Voltage Range 0 to VDD 0 to VDD 0 to VDD V DC Leakage Current ±0.5 ±0.5 ±0.5 μA max Input Capacitance 20 20 20 pF typ Track-and-hold in track; 6 pF typ when in hold LOGIC INPUTS Input High Voltage, VINH 2.4 2.4 2.4 V min 1.8 1.8 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.8 0.8 0.8 V max VDD = 5 V 0.4 0.4 0.4 V max VDD = 3 V Input Current, IIN, SCLK Pin ±0.5 ±0.5 ±0.5 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±10 ±10 ±10 nA typ Input Capacitance, C 6 IN 5 5 5 pF max Rev. G | Page 3 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476A SPECIFICATIONS AD7477A SPECIFICATIONS AD7478A SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION THE CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE AD7478A IN A 12 SCLK CYCLE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476A/AD7477A/AD7478A TO ADSP-2181 INTERFACE AD7476A/AD7477A/AD7478A TO DSP563xx INTERFACE APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
Data Sheet AD7476A/AD7477A/AD7478A SPECIFICATIONS AD7476A SPECIFICATIONS
VDD = 2.35 V to 5.25 V, fSCLK = 20 MHz, fSAMPLE = 1 MSPS, TA = TMIN to TMAX, unless otherwise noted.1
Table 1. Parameter A Grade2 B Grade2 Y Grade2 Unit Test Conditions/Comments
DYNAMIC PERFORMANCE fIN = 100 kHz sine wave Signal-to-Noise-and-Distortion (SINAD)3 70 70 70 dB min VDD = 2.35 V to 3.6 V, TA = 25°C 69 69 69 dB min VDD = 2.4 V to 3.6 V 71.5 71.5 71.5 dB typ VDD = 2.35 V to 3.6 V 69 69 69 dB min VDD = 4.75 V to 5.25 V, TA = 25°C 68 68 68 dB min VDD = 4.75 V to 5.25 V Signal-to-Noise Ratio (SNR)3 71 71 71 dB min VDD = 2.35 V to 3.6 V, TA = 25°C 70 70 70 dB min VDD = 2.4 V to 3.6 V 70 70 70 dB min VDD = 4.75 V to 5.25 V, TA = 25°C 69 69 69 dB min VDD = 4.75 V to 5.25 V Total Harmonic Distortion (THD)3 –80 –80 –80 dB typ Peak Harmonic or Spurious Noise (SFDR)3 –82 –82 –82 dB typ Intermodulation Distortion (IMD)3 Second-Order Terms –84 –84 –84 dB typ fa = 100.73 kHz, fb = 90.72 kHz Third-Order Terms –84 –84 –84 dB typ fa = 100.73 kHz, fb = 90.72 kHz Aperture Delay 10 10 10 ns typ Aperture Jitter 30 30 30 ps typ Full Power Bandwidth 13.5 13.5 13.5 MHz typ At 3 dB 2 2 2 MHz typ At 0.1 dB DC ACCURACY B and Y grades4 Resolution 12 12 12 Bits Integral Nonlinearity3 ±1.5 ±1.5 LSB max ±0.75 LSB typ Differential Nonlinearity –0.9/+1.5 –0.9/+1.5 LSB max Guaranteed no missed codes to 12 bits ±0.75 LSB typ Offset Error3, 5 ±1.5 ±1.5 LSB max ±1.5 ±0.2 ±0.2 LSB typ Gain Error3, 5 ±1.5 ±1.5 LSB max ±1.5 ±0.5 ±0.5 LSB typ Total Unadjusted Error (TUE)3, 5 ±2 ±2 LSB max ANALOG INPUT Input Voltage Range 0 to VDD 0 to VDD 0 to VDD V DC Leakage Current ±0.5 ±0.5 ±0.5 μA max Input Capacitance 20 20 20 pF typ Track-and-hold in track; 6 pF typ when in hold LOGIC INPUTS Input High Voltage, VINH 2.4 2.4 2.4 V min 1.8 1.8 1.8 V min VDD = 2.35 V Input Low Voltage, VINL 0.8 0.8 0.8 V max VDD = 5 V 0.4 0.4 0.4 V max VDD = 3 V Input Current, IIN, SCLK Pin ±0.5 ±0.5 ±0.5 μA max Typically 10 nA, VIN = 0 V or VDD Input Current, IIN, CS Pin ±10 ±10 ±10 nA typ Input Capacitance, C 6 IN 5 5 5 pF max Rev. G | Page 3 of 28 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS AD7476A SPECIFICATIONS AD7477A SPECIFICATIONS AD7478A SPECIFICATIONS TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION CIRCUIT INFORMATION THE CONVERTER OPERATION ADC TRANSFER FUNCTION TYPICAL CONNECTION DIAGRAM ANALOG INPUT DIGITAL INPUTS MODES OF OPERATION NORMAL MODE POWER-DOWN MODE POWER-UP TIME POWER VS. THROUGHPUT RATE SERIAL INTERFACE AD7478A IN A 12 SCLK CYCLE SERIAL INTERFACE MICROPROCESSOR INTERFACING AD7476A/AD7477A/AD7478A TO ADSP-2181 INTERFACE AD7476A/AD7477A/AD7478A TO DSP563xx INTERFACE APPLICATION HINTS GROUNDING AND LAYOUT OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS
