Datasheet AD9433 (Analog Devices) - 8

AD9433 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS E T D U O O IN D D F F E E D DR M S D CC N N CC CC F V GN AI AI GN V VR VR V GN S DF GN 52 51 50 49 48 47 46 45 44 43 42 41 40 GND 1 39 GND V 2 PIN 1 38 GND CC GND 3 37 VCC GND 4 36 VCC V 5 35 GND CC AD9433 V 6 34 GND CC TOP VIEW ENCODE 7 (Not to Scale) 33 GND ENCODE 8 32 VDD GND 9 31 DGND V 10 30 D0 (LSB) CC GND 11 29 D1 DGND 12 28 D2 V 13 27 D3 DD 14 15 16 17 18 19 20 21 22 23 24 25 26 ) OR B D9 D8 D7 D6 DD DD D5 D4 D10 ND V V ND DG DG 1 (MS D1 NOTES 1. THE EXPOSED PADDLE ON THE UNDERSIDE OF THE PACKAGE MUST BE SOLDERED TO THE GROUND PLANE. SOLDERING THE EXPOSED
02 0
PADDLE TO THE PCB INCREASES THE RELIABILITY OF THE SOLDER
7-
JOINTS, MAXIMIZING THE THERMAL CAPABILITY OF THE PACKAGE.
97 01 Figure 3. Pin Configuration
Table 6. Pin Function Descriptions Pin No. Mnemonic Description
1, 3, 4, 9, 11, 33, GND Analog Ground. 34, 35, 38, 39, 40, 43, 48, 51 2, 5, 6, 10, 36, 37, VCC Analog Supply (5 V). 44, 47, 52 7 ENCODE Encode Clock for ADC, Complementary. 8 ENCODE Encode Clock for ADC, True. ADC samples on rising edge of ENCODE. 12, 21, 24, 31 DGND Digital Output Ground. 13, 22, 23, 32 VDD Digital Output Power Supply (3 V). 14 OR Out-of-Range Output. 15 to 20, 25 to 30 D11 to D6, D5 to D0 Digital Output. 41 DFS Data Format Select. Logic low = twos complement, logic high = offset binary; floats low. 42 SFDR MODE CMOS Control Pin. This pin enables SFDR mode, a proprietary circuit that can improve the SFDR performance of the AD9433. SFDR mode is useful in applications where the dynamic range of the system is limited by discrete spurious frequency content caused by nonlinearities in the ADC transfer function. Set this pin to 0 for normal operation; floats low. 45 VREFIN Reference Input for ADC (2.5 V Typical). Bypass with 0.1 μF capacitor to ground. 46 VREFOUT Internal Reference Output (2.5 V Typical). 49 AIN Analog Input, True. 50 AIN Analog Input, Complementary. Exposed Pad (EP) The exposed paddle on the underside of the package must be soldered to the ground plane. Soldering the exposed paddle to the PCB increases the reliability of the solder joints, maximiz- ing the thermal capability of the package. Rev. A | Page 7 of 20 Document Outline FEATURES APPLICATIONS GENERAL INTRODUCTION FUNCTIONAL BLOCK DIAGRAM PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DC SPECIFICATIONS AC SPECIFICATIONS SWITCHING SPECIFICATIONS TIMING DIAGRAM ABSOLUTE MAXIMUM RATINGS EXPLANATION OF TEST LEVELS THERMAL CHARACTERISTICS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY EQUIVALENT CIRCUITS THEORY OF OPERATION ENCODE INPUT ENCODE VOLTAGE LEVEL DEFINITION ANALOG INPUT SFDR OPTIMIZATION DIGITAL OUTPUTS VOLTAGE REFERENCE TIMING APPLICATIONS INFORMATION LAYOUT INFORMATION REPLACING THE AD9432 WITH THE AD9433 OUTLINE DIMENSIONS ORDERING GUIDE