Datasheet AD7709 (Analog Devices) - 8
| Manufacturer | Analog Devices |
| Description | 16-Bit Sigma Delta ADC with Current Sources, Switchable Reference Inputs and I/O Port |
| Pages / Page | 33 / 8 — AD7709. ISINK (1.6mA WITH VDD = 5V. 100. A WITH VDD = 3V). TO OUTPUT. … |
| Revision | A |
| File Format / Size | PDF / 442 Kb |
| Document Language | English |
AD7709. ISINK (1.6mA WITH VDD = 5V. 100. A WITH VDD = 3V). TO OUTPUT. 1.6V. PIN. 50pF. ISOURCE (200. A WITH VDD = 5V. t11. SCLK. t15. t12. t13. DIN
Model Line for this Datasheet
Text Version of Document
AD7709 ISINK (1.6mA WITH VDD = 5V 100 A WITH VDD = 3V) TO OUTPUT 1.6V PIN 50pF ISOURCE (200 A WITH VDD = 5V 100 A WITH VDD = 3V)
Figure 1. Load Circuit for Timing Characterization
CS t11 t t 14 16 SCLK t15 t12 t13 DIN MSB LSB
Figure 2. Write Cycle Timing Diagram
RDY t3 t10 CS t t8 4 t6 SCLK t t 7 5 t t 5A 9 DOUT MSB LSB
Figure 3. Read Cycle Timing Diagram REV. A –7– Document Outline FEATURES INTERFACE POWER ON-CHIP FUNCTIONS APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics ADC CIRCUIT INFORMATION Overview Sigma-Delta ADC NOISE PERFORMANCE ON-CHIP REGISTERS Communications Register (A1, A0 = 0, 0) Status Register (A1, A0 = 0, 0; Power-On-Reset = 00H) Configuration Register (A1, A0 = 0, 1; Power-On-Reset = 000007H) Filter Register (A1, A0 = 1, 0; Power-On-Reset = 45h) ADC Data Result Register (A1, A0 = 1, 1; Power-On-Reset = 0000h CONFIGURING THE AD7709 DIGITAL INTERFACE MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7709-to-68HC11 Interface AD7709-to-8051 Interface AD7709-to-ADSP-2103/ADSP-2105 Interface CIRCUIT DESCRIPTION Analog Input Channels Programmable Gain Amplifier Bipolar/Unipolar Configuration Data Output Coding Excitation Currents Crystal Oscillator Reference Input Reset Input Power-Down Mode Grounding and Layout APPLICATIONS Pressure Measurement Temperature Measurement 3-Wire RTD Configurations Smart Transmitters OUTLINE DIMENSIONS Revision History
Figure 1. Load Circuit for Timing Characterization
CS t11 t t 14 16 SCLK t15 t12 t13 DIN MSB LSB
Figure 2. Write Cycle Timing Diagram
RDY t3 t10 CS t t8 4 t6 SCLK t t 7 5 t t 5A 9 DOUT MSB LSB
Figure 3. Read Cycle Timing Diagram REV. A –7– Document Outline FEATURES INTERFACE POWER ON-CHIP FUNCTIONS APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS SPECIFICATIONS TIMING CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION ORDERING GUIDE PIN FUNCTION DESCRIPTIONS Typical Performance Characteristics ADC CIRCUIT INFORMATION Overview Sigma-Delta ADC NOISE PERFORMANCE ON-CHIP REGISTERS Communications Register (A1, A0 = 0, 0) Status Register (A1, A0 = 0, 0; Power-On-Reset = 00H) Configuration Register (A1, A0 = 0, 1; Power-On-Reset = 000007H) Filter Register (A1, A0 = 1, 0; Power-On-Reset = 45h) ADC Data Result Register (A1, A0 = 1, 1; Power-On-Reset = 0000h CONFIGURING THE AD7709 DIGITAL INTERFACE MICROCOMPUTER/MICROPROCESSOR INTERFACING AD7709-to-68HC11 Interface AD7709-to-8051 Interface AD7709-to-ADSP-2103/ADSP-2105 Interface CIRCUIT DESCRIPTION Analog Input Channels Programmable Gain Amplifier Bipolar/Unipolar Configuration Data Output Coding Excitation Currents Crystal Oscillator Reference Input Reset Input Power-Down Mode Grounding and Layout APPLICATIONS Pressure Measurement Temperature Measurement 3-Wire RTD Configurations Smart Transmitters OUTLINE DIMENSIONS Revision History
